Hi Peng, Here are some comments unrelated to the UART issue.
On Sun, Apr 7, 2024 at 7:35 AM Peng Fan <peng....@nxp.com> wrote: > SOC: 0xa1009300 > LC: 0x2040010 > M33 prepare ok Could you remove these three lines? They are not very helpful and add noise to the boot log. > Normal Boot > Trying to boot from BOOTROM > Boot Stage: Primary boot > image offset 0x8000, pagesize 0x200, ivt offset 0x0 > Load image from 0x49800 by ROM_API > NOTICE: BL31: v2.8(release):lf-6.6.3-1.0.0-10-gf12d90141 > NOTICE: BL31: Built : 09:34:44, Mar 27 2024 > > > U-Boot 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800) > > Reset Status: POR > > Could not read CPU frequency: -2 > CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz Please fix this. I am sure the CPU is not running at 0 MHz :-) > CPU: Industrial temperature grade (-40C to 105C) at 26C > > Model: NXP i.MX93 11X11 EVK board > DRAM: 2 GiB > Core: 188 devices, 24 uclasses, devicetree: separate > WDT: Started watchdog@42490000 with servicing every 1000ms (40s timeout) > MMC: FSL_SDHC: 0, FSL_SDHC: 1 > Loading Environment from MMC... *** Warning - bad CRC, using default > environment > > In: serial@44380000 > Out: serial@44380000 > Err: serial@44380000 > switch to partitions #0, OK > mmc1 is current device > Net: > Warning: ethernet@428a0000 (eth1) using random MAC address - 6a:c2:96:d2:68:a6 > eth0: ethernet@42890000 [PRIME], eth1: ethernet@428a0000 Aren't the MAC address fuses programmed? Or are they not being read correctly?