Hi,
On 09/04/2024 20:03, Caleb Connolly wrote:
We currently default to the lowest rate but this actually doesn't work
on most platforms. Default to the HS400 speed instead which is most
common on Qualcomm platforms.
Signed-off-by: Caleb Connolly <caleb.conno...@linaro.org>
---
drivers/mmc/msm_sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index ea5d6b4cbbee..2144772ac325 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -61,9 +61,9 @@ static int msm_sdc_clk_init(struct udevice *dev)
const char *clk_name;
ret = ofnode_read_u32(node, "clock-frequency", (uint *)(&clk_rate));
if (ret)
- clk_rate = 400000;
+ clk_rate = 201500000;
I think we may either use INT_MAX so the clock driver uses the max freq in the
table,
or we could also parse the DT OPPs and take the max frequency ?
ret = clk_get_bulk(dev, &prv->clks);
if (ret) {
log_warning("Couldn't get mmc clocks: %d\n", ret);
