Re: [PATCH 2/3] pci: dw_imx: add support for IMX8MM

[Marek Vasut]

On 4/17/24 10:09 PM, Tim Harvey wrote:

Add support for the IMX8MM SoC by adding driver data with the compatible
string of the GPR controller.

Signed-off-by: Tim Harvey <thar...@gateworks.com>
---
  drivers/pci/pcie_dw_imx.c | 20 ++++++++++++++++++--
  1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
index a2ee228224b5..10d926c30645 100644
--- a/drivers/pci/pcie_dw_imx.c
+++ b/drivers/pci/pcie_dw_imx.c
@@ -45,6 +45,10 @@
  #define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDE_EN    BIT(10)
  #define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDE               BIT(11)

+struct pcie_chip_info {

+       const char *gpr;
+};
+
  struct pcie_dw_imx {
        /* Must be first member of the struct */
        struct pcie_dw                  dw;
@@ -54,6 +58,15 @@ struct pcie_dw_imx {
        struct reset_ctl                apps_reset;
        struct phy                      phy;
        struct udevice                  *vpcie;
+       struct pcie_chip_info           *info;
+};
+
+static const struct pcie_chip_info imx8mm_chip_info = {
+       .gpr = "fsl,imx8mm-iomuxc-gpr",
+};
+
+static const struct pcie_chip_info imx8mp_chip_info = {
+       .gpr = "fsl,imx8mp-iomuxc-gpr",
  };

static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed)

@@ -246,6 +259,8 @@ static int pcie_dw_imx_of_to_plat(struct udevice *dev)
        ofnode gpr;
        int ret;

+ priv->info = (void *)dev_get_driver_data(dev);

+

Does this really have to be cached in priv ?

The priv->info seems used only in this function.

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