On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for ETH1 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut <ma...@denx.de>
> ---
> Cc: Patrice Chotard <patrice.chot...@foss.st.com>
> Cc: Patrick Delaunay <patrick.delau...@foss.st.com>
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
> arch/arm/dts/stm32mp13-pinctrl.dtsi | 46 +++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi
> b/arch/arm/dts/stm32mp13-pinctrl.dtsi
> index 396fb6eee84..c709d64edcc 100644
> --- a/arch/arm/dts/stm32mp13-pinctrl.dtsi
> +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi
> @@ -26,6 +26,52 @@
> };
> };
>
> + eth1_rgmii_pins_a: eth1-rgmii-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 13, AF11)>, /*
> ETH_RGMII_TXD0 */
> + <STM32_PINMUX('G', 14, AF11)>, /*
> ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 2, AF11)>, /*
> ETH_RGMII_TXD2 */
> + <STM32_PINMUX('E', 5, AF10)>, /*
> ETH_RGMII_TXD3 */
> + <STM32_PINMUX('B', 11, AF11)>, /*
> ETH_RGMII_TX_CTL */
> + <STM32_PINMUX('C', 1, AF11)>, /*
> ETH_RGMII_GTX_CLK */
> + <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
> + <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <2>;
> + };
> +
> + pins2 {
> + pinmux = <STM32_PINMUX('C', 4, AF11)>, /*
> ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 5, AF11)>, /*
> ETH_RGMII_RXD1 */
> + <STM32_PINMUX('B', 0, AF11)>, /*
> ETH_RGMII_RXD2 */
> + <STM32_PINMUX('B', 1, AF11)>, /*
> ETH_RGMII_RXD3 */
> + <STM32_PINMUX('A', 7, AF11)>, /*
> ETH_RGMII_RX_CTL */
> + <STM32_PINMUX('D', 7, AF10)>; /*
> ETH_RGMII_RX_CLK */
> + bias-disable;
> + };
> +
> + };
> +
> + eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /*
> ETH_RGMII_TXD0 */
> + <STM32_PINMUX('G', 14, ANALOG)>, /*
> ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 2, ANALOG)>, /*
> ETH_RGMII_TXD2 */
> + <STM32_PINMUX('E', 5, ANALOG)>, /*
> ETH_RGMII_TXD3 */
> + <STM32_PINMUX('B', 11, ANALOG)>, /*
> ETH_RGMII_TX_CTL */
> + <STM32_PINMUX('C', 1, ANALOG)>, /*
> ETH_RGMII_GTX_CLK */
> + <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
> + <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
> + <STM32_PINMUX('C', 4, ANALOG)>, /*
> ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 5, ANALOG)>, /*
> ETH_RGMII_RXD1 */
> + <STM32_PINMUX('B', 0, ANALOG)>, /*
> ETH_RGMII_RXD1 */
> + <STM32_PINMUX('B', 1, ANALOG)>, /*
> ETH_RGMII_RXD1 */
> + <STM32_PINMUX('A', 7, ANALOG)>, /*
> ETH_RGMII_RX_CTL */
> + <STM32_PINMUX('D', 7, ANALOG)>; /*
> ETH_RGMII_RX_CLK */
> + };
> + };
> +
> i2c1_pins_a: i2c1-0 {
> pins {
> pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>
Thanks
Patrice
