Hi Quentin,

On 2024-04-02 15:22, Quentin Schulz wrote:
> Hi Jonas,
> 
> On 3/31/24 22:28, Jonas Karlman wrote:
>> The RK3399 SoC support the ARMv8 Cryptography Extensions, use of ARMv8
>> crypto can speed up FIT checksum validation in SPL.
>>
>> Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
>> extensions for SHA256 when validating checksum of FIT images.
>>
>> Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
>> validation to almost all RK3399 boards.
>>
>> The following boards have been excluded:
>> - chromebook_bob: SPL max size limitation of 120 KiB
>> - chromebook_kevin: SPL max size limitation of 120 KiB
>> - puma-rk3399: SPL stack in SRAM and TPL+SPL combined max size
>>                 limitation of 224 KiB
>>
> 
> I think we should move the SPL stack out of SRAM, thanks for hinting at 
> this. This is clearly something I missed when migrating Puma to TPL+SPL 
> as all other devices were migrated way earlier than this board, c.f. 
> https://source.denx.de/u-boot/u-boot/-/commit/f113d7d3034672de7d074506a05a7055f1f0dcae
>  
> for the default address.

Great, I included a patch in v2 to use same bss and stack addresses as
most other rk3399 boards.

> 
> Considering that SPL_MAX_SIZE is set to 0x2e000 (184K) right now, we 
> should fail if we reach that size. But I couldn't with applying the same 
> changes as in this patch, is there something I'm missing that prevents 
> this from happening on Puma? Just trying to figure out what we need to 
> do to not stay too far from most RK3399 devices :)

Sure, I have changed to not exclude puma in v2.

> 
> """
> diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
> index c2aa02ec74b..f3d23fa3f11 100644
> --- a/configs/puma-rk3399_defconfig
> +++ b/configs/puma-rk3399_defconfig
> @@ -21,8 +21,12 @@ CONFIG_DEBUG_UART_BASE=0xFF180000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SPL_SPI_FLASH_SUPPORT=y
>   CONFIG_SPL_SPI=y
> +CONFIG_ARMV8_SET_SMPEN=y
> +CONFIG_ARMV8_CRYPTO=y
>   CONFIG_SYS_LOAD_ADDR=0x800800
>   CONFIG_DEBUG_UART=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>   CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_MISC_INIT_R=y
> @@ -115,4 +119,5 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
>   CONFIG_BMP_16BPP=y
>   CONFIG_BMP_24BPP=y
>   CONFIG_BMP_32BPP=y
> +# CONFIG_RSA is not set
>   CONFIG_ERRNO_STR=y
> """
> 
> (not booted).
> 
> Additionally, I think I should be able to bump SPL_MAX_SIZE to 0x30000 
> (224K offset for U-Boot proper on MMC - 32K offset for TPL+SPL on MMC), 
> don't you think?

Not sure what the best value would be, if I am not mistaken the 224 KiB
limit is for the combined header+TPL+SPL (idbloader.img). A quick test
build show TPL to be around 52 KiB, that leaves around 172 KiB for SPL,
the SPL binary currently only take up around 132 KiB. With CONFIG_LTO=y
build output shrink a little bit to 50 KiB + 117 KiB.

I did not include any change to SPL_MAX_SIZE in v2.

Regards,
Jonas

> 
> Backward compatibility is a PITA :)
> 
> Cheers,
> Quentin

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