Dear Kyle Moffett, In message <1300202627-7245-1-git-send-email-kyle.d.moff...@boeing.com> you wrote: > The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit > integer divide operations to convert between nanoseconds and DDR clock > cycles given arbitrary DDR clock frequencies. ... > +/* To avoid 64-bit full-divides, we factor this here */ > +#define ULL_2e12 2000000000000ULL > +#define UL_5pow12 244140625UL > +#define UL_2pow13 (1UL << 13) > + > +#define ULL_8Fs 0xFFFFFFFFULL
Unfortunately this is already in mainline. Can you please send a cleanup patch to fix the CamelCaps macro names? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Every program has at least one bug and can be shortened by at least one instruction -- from which, by induction, one can deduce that every program can be reduced to one instruction which doesn't work. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot