Boston has a very limited memory range for PCI controllers, where
1MB can't easily fit into it.
Make alignment boundary of PCI memory resource allocation a Kconfig
option and default to 0x10000 for boston.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com>
---
drivers/pci/Kconfig | 9 +++++++++
drivers/pci/pci_auto.c | 16 ++++++++--------
2 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 8d02ab82ad9f..289d1deb38b6 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -75,6 +75,15 @@ config PCI_MAP_SYSTEM_MEMORY
This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
being used as virtual address.
+config PCI_BRIDGE_MEM_ALIGNMENT
+ hex "Alignment boundary of PCI memory resource allocation"
+ default 0x10000 if TARGET_BOSTON
+ default 0x100000
+ help
+ Specify a boundary for alignment of PCI memory resource allocation,
+ this is normally 0x100000 (1MB) but can be reduced to accommodate
+ hardware with tight bridge range if hardware allows.
+
config PCI_SRIOV
bool "Enable Single Root I/O Virtualization support for PCI"
help
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 90f818864457..b2c76b25801a 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -372,8 +372,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev,
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_mem, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -387,8 +387,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev,
int sub_bus)
}
if (pci_prefetch) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_prefetch, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_prefetch,
CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -465,8 +465,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev,
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr));
if (pci_mem) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_mem, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
((pci_mem->bus_lower - 1) >> 16) &
@@ -480,8 +480,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev,
int sub_bus)
&prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_prefetch, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_prefetch,
CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT,
(((pci_prefetch->bus_lower - 1) >> 16) &
--
2.34.1
