[PATCH 5/6] clk: renesas: Synchronize R-Car R8A779H0 V4M clock tables with Linux 6.9.3

[Marek Vasut]

Synchronize R-Car R8A779H0 V4M clock tables with Linux 6.9.3,
commit 1b4861e32e461b6fae14dc49ed0f1c7f20af5146 .

Signed-off-by: Marek Vasut <marek.vasut+rene...@mailbox.org>
---
 drivers/clk/renesas/r8a779h0-cpg-mssr.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c 
b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index 502b20b554a..b20d559bee2 100644
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
@@ -172,9 +172,9 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = {
 };
 
 static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
-       DEF_MOD("avb0-rgmii0",  211,    R8A779H0_CLK_S0D8_HSC),
-       DEF_MOD("avb1-rgmii1",  212,    R8A779H0_CLK_S0D8_HSC),
-       DEF_MOD("avb2-rgmii2",  213,    R8A779H0_CLK_S0D8_HSC),
+       DEF_MOD("avb0:rgmii0",  211,    R8A779H0_CLK_S0D8_HSC),
+       DEF_MOD("avb1:rgmii1",  212,    R8A779H0_CLK_S0D8_HSC),
+       DEF_MOD("avb2:rgmii2",  213,    R8A779H0_CLK_S0D8_HSC),
        DEF_MOD("hscif0",       514,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif1",       515,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif2",       516,    R8A779H0_CLK_SASYNCPERD1),
@@ -185,9 +185,12 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
        DEF_MOD("i2c3",         521,    R8A779H0_CLK_S0D6_PER),
        DEF_MOD("rpc-if",       629,    R8A779H0_CLK_RPCD2),
        DEF_MOD("sdhi0",        706,    R8A779H0_CLK_SD0),
-       DEF_MOD("pfc0",         915,    R8A779H0_CLK_CL16M),
-       DEF_MOD("pfc1",         916,    R8A779H0_CLK_CL16M),
-       DEF_MOD("pfc2",         917,    R8A779H0_CLK_CL16M),
+       DEF_MOD("sydm1",        709,    R8A779H0_CLK_S0D6_PER),
+       DEF_MOD("sydm2",        710,    R8A779H0_CLK_S0D6_PER),
+       DEF_MOD("wdt1:wdt0",    907,    R8A779H0_CLK_R),
+       DEF_MOD("pfc0",         915,    R8A779H0_CLK_CP),
+       DEF_MOD("pfc1",         916,    R8A779H0_CLK_CP),
+       DEF_MOD("pfc2",         917,    R8A779H0_CLK_CP),
 };
 
 /*
-- 
2.43.0