Hi Simon, On 6/23/24 7:52 PM, Simon Glass wrote:
At present gd->ram_size is 0 in SPL, meaning that it is not possible to enable the cache. Correct this by always populating the RAM size correctly.This increases code size by about 500 bytes in SPL, since it must call the rather large rockchip_sdram_size() function. Signed-off-by: Simon Glass <s...@chromium.org>
Reviewed-by: Quentin Schulz <quentin.sch...@cherry.de> Thanks! Quentin
