On Thu, 20 Jun 2024 at 00:28, Tom Rini <tr...@konsulko.com> wrote:
>
> Implement a weak default version of flush_dcache_all which is based on
> the ARM default, which is to flush the entire range via
> flush_dcache_range(...).
>
> Signed-off-by: Tom Rini <tr...@konsulko.com>
> ---
> arch/powerpc/lib/cache.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c
> index e480b2696494..130318d745aa 100644
> --- a/arch/powerpc/lib/cache.c
> +++ b/arch/powerpc/lib/cache.c
> @@ -43,3 +43,12 @@ void flush_cache(ulong start_addr, ulong size)
> /* flush prefetch queue */
> asm volatile("isync" : : : "memory");
> }
> +
> +/*
> + * Default implementation:
> + * do a range flush for the entire range
> + */
> +void flush_dcache_all(void)
> +{
> + flush_dcache_range(0, ~0);
> +}
> --
> 2.34.1
>
Acked-by: Ilias Apalodimas <ilias.apalodi...@linaro.org>
