Hi there, I just started to work with the u-boot sources for my bachelor thesis. There was a part in the source which irritated me a bit.
I talk about ./arch/arm/cpu/armv7/omap-common/timer.c It's about that part of code: #define TIMER_LOAD_VAL 0xffffffff int timer_init(void) { /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr); /* enable timer */ writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, &timer_base->tclr); reset_timer_masked(); /* init the timestamp and lastinc value */ return 0; } The tldr ist loaded with 0xFFFFFFFF. The OMAP35x Technical Reference Manual (Rev. P) says on page 2583: Do not put the overflow value (0xFFFFFFFF) in the GPTi.TLDR register because it can lead to undesired results. Is there a reason why the value is used nevertheless? At this time I don't know where the timer is used, maybe the "undesired results" haven't been noticed yet? Thanks! Simon -- ------------------------------------------------- Simon Schwarz Corscience GmbH& Co. KG Henkestraße 91 D-91052 Erlangen e-mail: schw...@corscience.de Internet: www.corscience.de ------------------------------------------------- Corscience GmbH& Co.KG Sitz der Gesellschaft/Place of business: Erlangen Amtsgericht/Local court: Fürth Handelsregisternummer/Commercial Register No.: HRA 7510 Geschäftsführer/Managing director: Prof. Dr. Armin Bolz, Dr. Karl-Andreas Feldhahn, Dipl.-Volksw. Marc Griefahn CONFIDENTIALITY: This e-mail and any attachments are confidential and may also be privileged. If received in error, please do not disclose the contents to anyone, but notify us immediately by return e-mail and delete this e-mail and any attachments from your system. Thank you. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot