This commit adds SFC node for Radxa ROCK 5A. since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot be enabled both nodes at the same time. so status = "okay" is omitted here.
you may be able to enable sfc (and disable sdhci) by fdt overlay. SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency. Signed-off-by: FUKAUMI Naoki <na...@radxa.com> Link: https://lore.kernel.org/r/20240623023329.1044-2-na...@radxa.com Signed-off-by: Heiko Stuebner <he...@sntech.de> [ upstream commit: 00224650dd45e166ea6eb1593f5f064583963ccf ] (cherry picked from commit fde218de3133705f3f56dc8eb26baa878f0e0dc9) --- Changes in v2 - none --- dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts index 3b9a349362d..2e2f7f0e769 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts @@ -377,6 +377,19 @@ status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim0_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>; -- 2.43.0
