Hi, On Fri, 19 Jul 2024 13:00:09 +0200, Neil Armstrong wrote: > We experience huge problems with cache handling on Qualcomm > systems, and it appears the dcache handling in the UFS core > is quite wrong and causes all those issues. > > This serie fixes the dcache operations, and fixes a big data > write corruption due to a wrong data end address calculation. > > [...]
Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-ufs (u-boot-ufs-next) [1/4] ufs: allocate descriptors with size aligned with DMA_MINALIGN https://source.denx.de/u-boot/custodians/u-boot-ufs/-/commit/9c223d8d8b8fbad667971f36eabe203480a8c39b [2/4] ufs: fix dcache flush and invalidate range calculation https://source.denx.de/u-boot/custodians/u-boot-ufs/-/commit/c64d22b57d8a9fe4d08ab677ba33d6004b98a468 [3/4] ufs: split flush and invalidate to only invalidate when required https://source.denx.de/u-boot/custodians/u-boot-ufs/-/commit/4139e5680bcf3016561c8830d914ee0b0ab741d1 [4/4] ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary https://source.denx.de/u-boot/custodians/u-boot-ufs/-/commit/589a7bf0febbe4d3ca319569a55f21cf06e85424 -- Neil
