Hi, On Fri, 11 Oct 2024 16:38:23 +0200, Neil Armstrong wrote: > We experience huge problems with cache handling on Qualcomm > systems, and it appears the dcache handling in the DWC3 gadget > code is quite wrong and causes operational issues. > > This serie fixes the dcache operations on unaligned data, > and properly invalidate buffers when reading back data from > hardware. > > [...]
Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-dfu (u-boot-dfu) [1/3] usb: dwc3: allocate setup_buf with dma_alloc_coherent() https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/1f12fc7e3350b179d17efaf5ba00fc3683cf33ec [2/3] usb: dwc3: fix dcache flush range calculation https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/502a50ab1f7e32e3e90056597e8ce6a0931789ba [3/3] usb: dwc3: invalidate dcache on buffer used in interrupt handling https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/3e47302dd71267b85e5ec65c5b6d881c23cce6cb -- Mattijs
