On 11/27/2024 8:23 PM, Neha Malcom Francis wrote:
Add DT node for PBIST_14 that is responsible for triggering the PBIST
self-tests for the MAIN_R5_2_x cores.

Signed-off-by: Neha Malcom Francis <[email protected]>
---
  dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)

diff --git a/dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi 
b/dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi
index d4ac1c9872a..21e2777cd9d 100644
--- a/dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j784s4-main.dtsi
@@ -2782,4 +2782,16 @@
                power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
                status = "disabled";
        };
+
+       bist_main14: bist@33c0000 {
+               compatible = "ti,j784s4-bist";
+               reg-names = "cfg", "ctrl_mmr";
+               reg = <0x00 0x033c0000 0x00 0x400>,
+                         <0x00 0x0010c1a0 0x00 0x01c>;
+               clocks = <&k3_clks 237 7>;

Please go through kernel route for device tree update.

Even this is getting applied, in next kernel-u-boot sync, we will be losing this node


+               power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+               bootph-pre-ram;
+               ti,bist-instance = <14>;
+               cores-under-test = <&main_r5fss2_core0>, <&main_r5fss2_core1>;
+       };
  };

Reply via email to