Re: [PATCH] board: solidrun: clearfog: enable ddr odt0 on write for both chip-select

[Stefan Roese]

On 27.11.24 13:32, Josua Mayer wrote:

Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.

Enable ODT[0] for both chip-select during write only.

Original work by Baruch Siach [1] and Chris Packham [2].

[1] 
https://github.com/SolidRun/u-boot-armada38x/commit/aba763a611e69fbcc4e229659da9d84f16b39814
[2] 
https://github.com/SolidRun/u-boot-armada38x/commit/dbaf09590df9add19e738d2de03c0f2d0d8f5433

Signed-off-by: Josua Mayer <jo...@solid-run.com>

Reviewed-by: Stefan Roese <s...@denx.de>

Thanks,
Stefan

---
  board/solidrun/clearfog/clearfog.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/solidrun/clearfog/clearfog.c 
b/board/solidrun/clearfog/clearfog.c
index 
2dbd071abd9f29cee97fb813a67d0190a620bd32..67b60d2e7b43331383b6a01b13693b29b21129be
 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -161,7 +161,7 @@ static struct mv_ddr_topology_map board_topology_map = {
        {0},                            /* timing parameters */
        { {0} },                        /* electrical configuration */
        {0,},                           /* electrical parameters */
-       0,                              /* ODT configuration */
+       0x30000,                        /* ODT configuration */
        0x3,                            /* clock enable mask */
  };

---
base-commit: 3881c6b90350b0b04085ad46ef64989b43967eef
change-id: 20241127-a388-sr-som-odt-89f8dd6b6410

Best regards,

Viele Grüße,
Stefan Roese

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