Bind missing DSI and MIPI calibration devices.

Signed-off-by: Svyatoslav Ryhel <[email protected]>
---
 arch/arm/dts/tegra124.dtsi | 39 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index ffec9cae09d..cac9b112302 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -136,6 +136,38 @@
                        status = "disabled";
                };
 
+               dsi@54300000 {
+                       compatible = "nvidia,tegra124-dsi";
+                       reg = <0x54300000 0x00040000>;
+                       clocks = <&tegra_car TEGRA124_CLK_DSIA>,
+                                <&tegra_car TEGRA124_CLK_DSIALP>,
+                                <&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 48>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB 
pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               dsi@54400000 {
+                       compatible = "nvidia,tegra124-dsi";
+                       reg = <0x54400000 0x00040000>;
+                       clocks = <&tegra_car TEGRA124_CLK_DSIB>,
+                                <&tegra_car TEGRA124_CLK_DSIBLP>,
+                                <&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 82>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID 
pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                sor@54540000 {
                        compatible = "nvidia,tegra124-sor";
                        reg = <0x54540000 0x00040000>;
@@ -737,6 +769,13 @@
                #thermal-sensor-cells = <1>;
        };
 
+       mipi: mipi@700e3000 {
+               compatible = "nvidia,tegra124-mipi";
+               reg = <0x700e3000 0x100>;
+               clocks = <&tegra_car TEGRA124_CLK_MIPI_CAL>;
+               #nvidia,mipi-calibrate-cells = <1>;
+       };
+
        dfll: clock@70110000 {
                compatible = "nvidia,tegra124-dfll";
                reg = <0x70110000 0x100>, /* DFLL control */
-- 
2.43.0

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