On 12/18/24 10:22 AM, Abbarapu, Venkatesh wrote:
For parallel/stacked configuration and address width the
"rem_bank_len" will vary
and as we don't want to disturb the default read functionality added
the ifdef separately.
What would happen if both SPI_FLASH_BAR and SPI_STACKED_PARALLEL
are
enabled on a system that only has one SPI NOR attached
(non-stacked/parallel) ? I noticed the second "copy" of the code
behaves slightly differently in the else branch, so does that mean this would
break such setup ?
If both SPI_FLASH_BAR and SPI_STACKED_PARALLEL are enabled, the
"rem_bank_len" manipulation is done under the
CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL) code and this won't break any
default functionality.
Wouldn't read_len calculation be done twice ?
Yes. As "rem_bank_len" will be changed based on parallel configuration, so
added the additional code copy to not break the default code.
Can you please also update it to avoid the code duplication ?
Thank you
