ping ... On 06/15/2011 11:11 AM, Hong Xu wrote: > Rework for AT91SAM9RL-EK, makes it build again. > Based on the work for AT91SAM9260-EK. > > Signed-off-by: Hong Xu <hong...@atmel.com> > --- > Makefile | 12 ---- > board/atmel/at91sam9rlek/at91sam9rlek.c | 73 ++++++++++++++++---------- > board/atmel/at91sam9rlek/config.mk | 1 - > board/atmel/at91sam9rlek/led.c | 6 ++- > boards.cfg | 3 + > include/configs/at91sam9rlek.h | 85 +++++++++++++++++------------- > 6 files changed, 100 insertions(+), 80 deletions(-) > delete mode 100644 board/atmel/at91sam9rlek/config.mk > > diff --git a/Makefile b/Makefile > index cd328b3..4e19fed 100644 > --- a/Makefile > +++ b/Makefile > @@ -785,18 +785,6 @@ at91sam9263ek_config : unconfig > fi; > @$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91 > > -at91sam9rlek_nandflash_config \ > -at91sam9rlek_dataflash_config \ > -at91sam9rlek_dataflash_cs0_config \ > -at91sam9rlek_config : unconfig > - @mkdir -p $(obj)include > - @if [ "$(findstring _nandflash,$@)" ] ; then \ > - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ > - else \ > - echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \ > - fi; > - @$(MKCONFIG) -n $@ -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91 > - > at91sam9m10g45ek_nandflash_config \ > at91sam9m10g45ek_dataflash_config \ > at91sam9m10g45ek_dataflash_cs0_config \ > diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c > b/board/atmel/at91sam9rlek/at91sam9rlek.c > index e374917..e559084 100644 > --- a/board/atmel/at91sam9rlek/at91sam9rlek.c > +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c > @@ -23,6 +23,7 @@ > */ > > #include <common.h> > +#include <asm/io.h> > #include <asm/arch/at91sam9rl.h> > #include <asm/arch/at91sam9rl_matrix.h> > #include <asm/arch/at91sam9_smc.h> > @@ -31,7 +32,7 @@ > #include <asm/arch/at91_rstc.h> > #include <asm/arch/clk.h> > #include <asm/arch/gpio.h> > -#include <asm/arch/io.h> > + > #include <lcd.h> > #include <atmel_lcdc.h> > #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) > @@ -48,33 +49,37 @@ DECLARE_GLOBAL_DATA_PTR; > #ifdef CONFIG_CMD_NAND > static void at91sam9rlek_nand_hw_init(void) > { > + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; > + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > unsigned long csa; > > /* Enable CS3 */ > - csa = at91_sys_read(AT91_MATRIX_EBICSA); > - at91_sys_write(AT91_MATRIX_EBICSA, > - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); > + csa = readl(&matrix->ebicsa); > + csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; > + > + writel(csa, &matrix->ebicsa); > > /* Configure SMC CS3 for NAND/SmartMedia */ > - at91_sys_write(AT91_SMC_SETUP(3), > - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | > - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); > - at91_sys_write(AT91_SMC_PULSE(3), > - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | > - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); > - at91_sys_write(AT91_SMC_CYCLE(3), > - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); > - at91_sys_write(AT91_SMC_MODE(3), > - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | > - AT91_SMC_EXNWMODE_DISABLE | > + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | > + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), > + &smc->cs[3].setup); > + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | > + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), > + &smc->cs[3].pulse); > + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), > + &smc->cs[3].cycle); > + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | > + AT91_SMC_MODE_EXNW_DISABLE | > #ifdef CONFIG_SYS_NAND_DBW_16 > - AT91_SMC_DBW_16 | > + AT91_SMC_MODE_DBW_16 | > #else /* CONFIG_SYS_NAND_DBW_8 */ > - AT91_SMC_DBW_8 | > + AT91_SMC_MODE_DBW_8 | > #endif > - AT91_SMC_TDF_(2)); > + AT91_SMC_MODE_TDF_CYCLE(2), > + &smc->cs[3].mode); > > - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); > + writel(1 << ATMEL_ID_PIOD, &pmc->pcer); > > /* Configure RDY/BSY */ > at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); > @@ -102,7 +107,7 @@ vidinfo_t panel_info = { > vl_vsync_len: 1, > vl_upper_margin:1, > vl_lower_margin:0, > - mmio: AT91SAM9RL_LCDC_BASE, > + mmio: ATMEL_BASE_LCDC, > }; > > void lcd_enable(void) > @@ -116,6 +121,8 @@ void lcd_disable(void) > } > static void at91sam9rlek_lcd_hw_init(void) > { > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + > at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */ > at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */ > at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */ > @@ -138,9 +145,7 @@ static void at91sam9rlek_lcd_hw_init(void) > at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ > at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ > > - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_LCDC); > - > - gd->fb_base = 0; > + writel(1 << ATMEL_ID_LCDC, &pmc->pcer); > } > > #ifdef CONFIG_LCD_INFO > @@ -157,7 +162,7 @@ void lcd_show_board_info(void) > lcd_printf ("(C) 2008 ATMEL Corp\n"); > lcd_printf ("at91supp...@atmel.com\n"); > lcd_printf ("%s CPU at %s MHz\n", > - CONFIG_SYS_AT91_CPU_NAME, > + ATMEL_CPU_NAME, > strmhz(temp, get_cpu_clk_rate())); > > dram_size = 0; > @@ -173,6 +178,17 @@ void lcd_show_board_info(void) > #endif /* CONFIG_LCD_INFO */ > #endif > > +int board_early_init_f(void) > +{ > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + > + /* Enable clocks for all PIOs */ > + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | > + (1 << ATMEL_ID_PIOC) | (1 << ATMEL_ID_PIOD), > + &pmc->pcer); > + > + return 0; > +} > > int board_init(void) > { > @@ -182,9 +198,9 @@ int board_init(void) > /* arch number of AT91SAM9RLEK-Board */ > gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK; > /* adress of boot parameters */ > - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; > + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; > > - at91_serial_hw_init(); > + at91_seriald_hw_init(); > #ifdef CONFIG_CMD_NAND > at91sam9rlek_nand_hw_init(); > #endif > @@ -199,7 +215,8 @@ int board_init(void) > > int dram_init(void) > { > - gd->bd->bi_dram[0].start = PHYS_SDRAM; > - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; > + gd->ram_size = get_ram_size( > + (void *)CONFIG_SYS_SDRAM_BASE, > + CONFIG_SYS_SDRAM_SIZE); > return 0; > } > diff --git a/board/atmel/at91sam9rlek/config.mk > b/board/atmel/at91sam9rlek/config.mk > deleted file mode 100644 > index e554a45..0000000 > --- a/board/atmel/at91sam9rlek/config.mk > +++ /dev/null > @@ -1 +0,0 @@ > -CONFIG_SYS_TEXT_BASE = 0x23f00000 > diff --git a/board/atmel/at91sam9rlek/led.c b/board/atmel/at91sam9rlek/led.c > index 9634cc0..987e8c0 100644 > --- a/board/atmel/at91sam9rlek/led.c > +++ b/board/atmel/at91sam9rlek/led.c > @@ -26,12 +26,14 @@ > #include <asm/arch/at91sam9rl.h> > #include <asm/arch/at91_pmc.h> > #include <asm/arch/gpio.h> > -#include <asm/arch/io.h> > +#include <asm/io.h> > > void coloured_LED_init(void) > { > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + > /* Enable clock */ > - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); > + writel(ATMEL_ID_PIOD, &pmc->pcer); > > at91_set_gpio_output(CONFIG_RED_LED, 1); > at91_set_gpio_output(CONFIG_GREEN_LED, 1); > diff --git a/boards.cfg b/boards.cfg > index 0c40e99..2244d5d 100644 > --- a/boards.cfg > +++ b/boards.cfg > @@ -89,6 +89,9 @@ at91sam9261ek_dataflash_cs3 arm arm926ejs > at91sam9261ek atmel > at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 > at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH > at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 > at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 > at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 > at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 > +at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 > at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH > +at91sam9rlek_dataflash_cs0 arm arm926ejs at91sam9rlek atmel at91 > at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH > +at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 > at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH > snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 > snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20 > cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260 > diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h > index 8dbd082..3ca09e1 100644 > --- a/include/configs/at91sam9rlek.h > +++ b/include/configs/at91sam9rlek.h > @@ -27,33 +27,42 @@ > #ifndef __CONFIG_H > #define __CONFIG_H > > -#define CONFIG_AT91_LEGACY > +#include <asm/hardware.h> > + > +#define CONFIG_SYS_TEXT_BASE 0x21F00000 > > /* ARM asynchronous clock */ > -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ > -#define CONFIG_SYS_HZ 1000 > +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ > +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ > +#define CONFIG_SYS_HZ 1000 > + > +#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ > > -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ > -#define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ > -#define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ > #define CONFIG_ARCH_CPU_INIT > -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ > +#define CONFIG_SKIP_LOWLEVEL_INIT > +#define CONFIG_BOARD_EARLY_INIT_F > +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ > > -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > -#define CONFIG_SETUP_MEMORY_TAGS 1 > -#define CONFIG_INITRD_TAG 1 > +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > +#define CONFIG_SETUP_MEMORY_TAGS 1 > +#define CONFIG_INITRD_TAG 1 > > -#define CONFIG_SKIP_LOWLEVEL_INIT > +#define CONFIG_DISPLAY_CPUINFO > + > +#define CONFIG_ATMEL_LEGACY > +#define CONFIG_AT91_GPIO 1 > +#define CONFIG_AT91_GPIO_PULLUP 1 > > /* > * Hardware drivers > */ > -#define CONFIG_AT91_GPIO 1 > -#define CONFIG_ATMEL_USART 1 > -#undef CONFIG_USART0 > -#undef CONFIG_USART1 > -#undef CONFIG_USART2 > -#define CONFIG_USART3 1 /* USART 3 is DBGU */ > + > +/* serial console */ > +#define CONFIG_ATMEL_USART > +#define CONFIG_USART_BASE ATMEL_BASE_DBGU > +#define CONFIG_USART_ID ATMEL_ID_SYS > +#define CONFIG_BAUDRATE 115200 > +#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600} > > /* LCD */ > #define CONFIG_LCD 1 > @@ -62,10 +71,13 @@ > #undef LCD_TEST_PATTERN > #define CONFIG_LCD_INFO 1 > #define CONFIG_LCD_INFO_BELOW_LOGO 1 > -#define CONFIG_SYS_WHITE_ON_BLACK 1 > +#define CONFIG_SYS_WHITE_ON_BLACK 1 > #define CONFIG_ATMEL_LCD 1 > #define CONFIG_ATMEL_LCD_RGB565 1 > -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 > +/* Let board_init_f handle the framebuffer allocation */ > +#undef CONFIG_FB_ADDR > +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 > + > > /* LED */ > #define CONFIG_AT91_LED > @@ -85,25 +97,29 @@ > #undef CONFIG_CMD_IMLS > #undef CONFIG_CMD_LOADS > #undef CONFIG_CMD_NET > +#undef CONFIG_CMD_NFS > #undef CONFIG_CMD_SOURCE > #undef CONFIG_CMD_USB > > -#define CONFIG_CMD_NAND 1 > +#define CONFIG_CMD_NAND 1 > > /* SDRAM */ > #define CONFIG_NR_DRAM_BANKS 1 > -#define PHYS_SDRAM 0x20000000 > -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ > +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 > +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 > + > +#define CONFIG_SYS_INIT_SP_ADDR \ > + (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) > > /* DataFlash */ > #define CONFIG_ATMEL_DATAFLASH_SPI > -#define CONFIG_HAS_DATAFLASH 1 > +#define CONFIG_HAS_DATAFLASH 1 > #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) > #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 > #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ > -#define AT91_SPI_CLK 15000000 > -#define DATAFLASH_TCSS (0x1a << 16) > -#define DATAFLASH_TCHS (0x1 << 24) > +#define AT91_SPI_CLK 15000000 > +#define DATAFLASH_TCSS (0x1a << 16) > +#define DATAFLASH_TCHS (0x1 << 24) > > /* NOR flash - not present */ > #define CONFIG_SYS_NO_FLASH 1 > @@ -112,7 +128,7 @@ > #ifdef CONFIG_CMD_NAND > #define CONFIG_NAND_ATMEL > #define CONFIG_SYS_MAX_NAND_DEVICE 1 > -#define CONFIG_SYS_NAND_BASE 0x40000000 > +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 > #define CONFIG_SYS_NAND_DBW_8 1 > /* our ALE is AD21 */ > #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) > @@ -129,7 +145,7 @@ > > #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ > > -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM > +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE > #define CONFIG_SYS_MEMTEST_END 0x23e00000 > > #ifdef CONFIG_SYS_USE_DATAFLASH > @@ -149,7 +165,7 @@ > #else /* CONFIG_SYS_USE_NANDFLASH */ > > /* bootstrap + u-boot + env + linux in nandflash */ > -#define CONFIG_ENV_IS_IN_NAND 1 > +#define CONFIG_ENV_IS_IN_NAND 1 > #define CONFIG_ENV_OFFSET 0x60000 > #define CONFIG_ENV_OFFSET_REDUND 0x80000 > #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ > @@ -161,25 +177,20 @@ > > #endif > > -#define CONFIG_BAUDRATE 115200 > -#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } > - > #define CONFIG_SYS_PROMPT "U-Boot> " > #define CONFIG_SYS_CBSIZE 256 > #define CONFIG_SYS_MAXARGS 16 > #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) > + 16) > #define CONFIG_SYS_LONGHELP 1 > -#define CONFIG_CMDLINE_EDITING 1 > +#define CONFIG_CMDLINE_EDITING 1 > > /* > * Size of malloc() pool > */ > -#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) > +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) > > #define CONFIG_STACKSIZE (32*1024) /* regular stack */ > > -#ifdef CONFIG_USE_IRQ > -#error CONFIG_USE_IRQ not supported > -#endif > +#undef CONFIG_USE_IRQ > > #endif > -- > 1.7.3.3 >
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