On 7/31/25 09:06, Michal Simek wrote:
After upgrading to QEMU 10 by commit 1d782a3f229c ("Docker, CI: Update to latest Ubuntu and Dockerfile") let's wire mbv32 which is the part of QEMU to have it under regression. Signed-off-by: Michal Simek <[email protected]> --- Changes in v2: - Add missing backslash to azure pipeline gitlab I have tested. azure I didn't test it but did blindly all changes as they are in github one. This patch has be applied on the top of this series https://lore.kernel.org/r/[email protected] --- .azure-pipelines.yml | 20 ++++++++++++++++++-- .gitlab-ci.yml | 32 ++++++++++++++++++++++++++++++-- 2 files changed, 48 insertions(+), 4 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 8209d2b329cb..d4bf43e7a923 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -258,11 +258,11 @@ stages: ln -s u_boot_boardenv_qemu_arm64_na.py /tmp/uboot-test-hooks/py/travis-ci/u_boot_boardenv_qemu_arm64_lwip_na.py ln -s travis-ci /tmp/uboot-test-hooks/bin/\`hostname\` ln -s travis-ci /tmp/uboot-test-hooks/py/\`hostname\` - if [[ "\${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + if [[ "\${TEST_PY_BD}" == "qemu-riscv32_spl" ]] || [[ "\${TEST_PY_BD}" == "xilinx_mbv32_smode" ]]; then wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ; export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; fi - if [[ "\${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "\${TEST_PY_BD}" == "sifive_unleashed" ]]; then + if [[ "\${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "\${TEST_PY_BD}" == "sifive_unleashed" ]] || [[ "\${TEST_PY_BD}" == "xilinx_mbv64_smode" ]]; then wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ; export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; fi @@ -540,6 +540,22 @@ stages: TEST_PY_BD: "sifive_unleashed" TEST_PY_ID: "--id spi-nor_qemu" TEST_PY_TEST_SPEC: "not sleep" + xilinx_mbv32: + TEST_PY_BD: "xilinx_mbv32" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep" + xilinx_mbv32_smode test.py: + TEST_PY_BD: "xilinx_mbv32_smode" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep" + xilinx_mbv64 test.py: + TEST_PY_BD: "xilinx_mbv64" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep" + xilinx_mbv64_smode test.py: + TEST_PY_BD: "xilinx_mbv64_smode" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep" xilinx_zynq_virt: TEST_PY_BD: "xilinx_zynq_virt" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 85401d3e09b1..b83cd1a5b232 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -43,11 +43,11 @@ stages: - ln -s u_boot_boardenv_qemu_arm64_na.py /tmp/uboot-test-hooks/py/travis-ci/u_boot_boardenv_qemu_arm64_lwip_na.py - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname` - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` - - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]] || [[ "${TEST_PY_BD}" == "xilinx_mbv32_smode" ]]; then wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ; export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; fi - - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then + - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]] || [[ "${TEST_PY_BD}" == "xilinx_mbv64_smode" ]]; then wget -O - https://github.com/riscv-software-src/opensbi/releases/download/v1.3.1/opensbi-1.3.1-rv-bin.tar.xz | tar -C /tmp -xJ; export OPENSBI=/tmp/opensbi-1.3.1-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; fi @@ -550,6 +550,34 @@ vexpress_fvp_bloblist test.py: - ${DEFAULT_AMD64_TAG} <<: *buildman_and_testpy_dfn+xilinx_mbv32 test.py:+ variables: + TEST_PY_BD: "xilinx_mbv32" + TEST_PY_TEST_SPEC: "not sleep" + TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + +xilinx_mbv32_smode test.py: + variables: + TEST_PY_BD: "xilinx_mbv32_smode" + TEST_PY_TEST_SPEC: "not sleep" + TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + +xilinx_mbv64 test.py: + variables: + TEST_PY_BD: "xilinx_mbv64" + TEST_PY_TEST_SPEC: "not sleep" + TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + +xilinx_mbv64_smode test.py: + variables: + TEST_PY_BD: "xilinx_mbv64_smode" + TEST_PY_TEST_SPEC: "not sleep" + TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + xilinx_zynq_virt test.py: variables: TEST_PY_BD: "xilinx_zynq_virt"
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs
