On Fri, 5 Sept 2025 at 11:19, Anshul Dalal <[email protected]> wrote: > > In dcache_enable, currently the dcache entries are only invalidated when > the MMU is not enabled. This causes issues when dcache_enable is called > with the MMU already configured, in such cases the existing dcache > entries are not flushed which might result in un-expected behavior. > > This patch invalidates the cache entries on every call of dcache_enable > before enabling dcache (by setting CR_C). This makes dcache_enable > behave similar to icache_enable as well. > > Signed-off-by: Anshul Dalal <[email protected]> > --- > arch/arm/cpu/armv8/cache_v8.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c > index 1c1e33bec24..6e662395a83 100644 > --- a/arch/arm/cpu/armv8/cache_v8.c > +++ b/arch/arm/cpu/armv8/cache_v8.c > @@ -830,16 +830,15 @@ void flush_dcache_range(unsigned long start, unsigned > long stop) > void dcache_enable(void) > { > /* The data cache is not active unless the mmu is enabled */ > - if (!(get_sctlr() & CR_M)) { > - invalidate_dcache_all(); > - __asm_invalidate_tlb_all(); > + if (!mmu_status()) > mmu_setup(); > - } > > /* Set up page tables only once (it is done also by mmu_setup()) */ > if (!gd->arch.tlb_fillptr) > setup_all_pgtables(); > > + invalidate_dcache_all(); > + __asm_invalidate_tlb_all(); > set_sctlr(get_sctlr() | CR_C); > } > > -- > 2.50.1 >
Reviewed-by: Ilias Apalodimas <[email protected]>
