Assure the reset is latched and the core is ready for DBI access. On R-Car V4H, the PCIe reset is asynchronized and does not take effect immediately, but needs a short time to complete. In case DBI access happens in that short time, that access generates an SError. Make sure that condition can never happen, read back the state of the reset which should turn the asynchronized reset into synchronized one, and wait a little over 1ms to add additional safety margin.
Signed-off-by: Marek Vasut <[email protected]> --- Cc: Nobuhiro Iwamatsu <[email protected]> Cc: Tom Rini <[email protected]> Cc: [email protected] --- drivers/pci/pci-rcar-gen4.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/pci-rcar-gen4.c b/drivers/pci/pci-rcar-gen4.c index 1b79d834122..74aa75d2927 100644 --- a/drivers/pci/pci-rcar-gen4.c +++ b/drivers/pci/pci-rcar-gen4.c @@ -316,6 +316,9 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar) if (ret) goto err_unprepare; + reset_status(&rcar->pwr_rst); + mdelay(1); + rcar_gen4_pcie_additional_common_init(rcar); return 0; -- 2.51.0
