Dear Tom, SoCFPGA updates for v2025.10
This pull request brings a set of updates across SoCFPGA platforms covering Agilex5, Agilex7, N5X, and Stratix10. The changes include: * Agilex5 enhancements: - USB3.1 enablement and DWC3 host driver support - System Manager register configuration for USB3 - Watchdog timeout increase and SDMMC clock API integration - dcache handling improvements in SMC mailbox path - Enable SPL_SYS_DCACHE_OFF in defconfig * Clock driver improvements: - Introduce dt-bindings header for Agilex clocks - Add enable/disable API and EMAC clock selection fixes - Replace manual shifts with FIELD_GET usage * DDR updates: - IOSSM mailbox compatibility check - Correct DDR calibration status handling * Device tree changes: - Agilex5: disable cache allocation for reads - Stratix10: add NAND IP node - Enable driver model watchdog - Enable USB3.1 node for Agilex5 * Config cleanups: - Simplify Agilex7 VAB defconfig - Remove obsolete SYS_BOOTM_LEN from N5X VAB config - Enable CRC32 support for SoCFPGA - Increase USB hub debounce timeout Overall this set improves reliability of DDR and cache flows, adds missing USB and MMC features for Agilex5, and refines clock and configuration handling across platforms. This patch set has been tested on Agilex 5 devkit, and Agilex devkit. Passing all pipeline tests at SoCFPGA U-boot custodian https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762 Thanks. Best regards, Tien Fong The following changes since commit a239b0b0b6dbe6a168969b8cd6e600cf85db278d: Add symlink from gpl-2.0.txt to a COPYING file (2025-09-29 11:56:16 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-socfpga.git tags/u-boot-socfpga-next-20250930 for you to fetch changes up to da57acb4c396cfc978c0652fec9dfb17a4f67ad8: arch: arm: socfpga: Configure USB3 System Manager registers (2025-09-30 14:45:37 +0800) ---------------------------------------------------------------- Alif Zakuan Yuslaimi (6): arm: socfpga: Define Use FPGA switch handoff section size for Agilex5 arm: socfpga: mailbox: Remove CONFIG_CADENCE_QSPI guard from QSPI mailbox API declarations configs: agilex5: Increase watchdog timeout include: dt-bindings: clk: agilex: Add Agilex clock definitions header file drivers: clk: agilex: Support for enable/disable API mmc: socfpga_dw_mmc: Enable/disable SDMMC clock via API Boon Khai Ng (3): arch: arm: mach-socfpga: smc: Add dcache flushing and invalidation in smc_send_mailbox() cache: Check dcache availability before calling cache functions configs: agilex5: Enable config SPL_SYS_DCACHE_OFF Naresh Kumar Ravulapalli (15): arch: arm: dts: agilex5: Disable cache allocation for reads arch: arm: dts: stratix10: Add NAND IP to base dtsi arch: arm: socfpga: Remove speed and mode from flash probe arm: dts: socfpga: Enable driver model for watchdog timer configs: Simplify Agilex7 VAB defconfig configs: socfpga: Add CRC32 support configs: socfpga: Remove SYS_BOOTM_LEN from N5X VAB config drivers: ddr: altera: Check IOSSM mailbox compatibility drivers: ddr: altera: Correct DDR calibration status check drivers: clk: agilex: Fix EMAC clock source selection drivers: clk: agilex: Use FIELD_GET during EMAC clock selection arch: arm: dts: Enable USB3.1 for Agilex5 configs: Enable USB DWC3 host drivers for Agilex5 configs: Increase USB Hub debounce timeout in Agilex5 arch: arm: socfpga: Configure USB3 System Manager registers arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 4 ++-- arch/arm/dts/socfpga_agilex5_socdk.dts | 4 ++++ arch/arm/dts/socfpga_stratix10.dtsi | 12 ++++++++++ arch/arm/dts/socfpga_stratix10_socdk.dts | 4 ++++ arch/arm/include/asm/io.h | 28 +++++++++++++---------- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 2 ++ arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 2 -- arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 12 ++++++++++ arch/arm/mach-socfpga/misc_arria10.c | 3 --- arch/arm/mach-socfpga/smc_api.c | 1 + arch/arm/mach-socfpga/system_manager_soc64.c | 24 ++++++++++++++++++++ common/memsize.c | 5 ++++- configs/socfpga_agilex5_defconfig | 5 +++++ configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 94 ++-------------------------------------------------------------------------- configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 - configs/socfpga_stratix10_defconfig | 1 + drivers/clk/altera/clk-agilex.c | 130 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----- drivers/clk/altera/clk-agilex.h | 20 +++++++++++++++++ drivers/ddr/altera/iossm_mailbox.c | 24 ++++++++++++++++++++ drivers/ddr/altera/sdram_soc64.c | 6 ++--- drivers/ddr/altera/sdram_soc64.h | 2 +- drivers/mmc/socfpga_dw_mmc.c | 33 ++++++++++++++------------- include/dt-bindings/clock/agilex-clock.h | 71 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 25 files changed, 351 insertions(+), 139 deletions(-) create mode 100644 include/dt-bindings/clock/agilex-clock.h
