On 11/3/25 2:11 PM, Patrick DELAUNAY wrote:
Hello Patrick,
So I think, this now covers
- NXP SoCs -- iMX8ULP , iMX95
- TI SoCs -- AM6.. ?
How about ST SoCs ?
No impacts for ST SoCs.
Now ae are using OP-TEE transport for SCMI messages without external
shared memory
compatible = "linaro,scmi-optee";
linaro,optee-channel-id = <0>;
=> the message are managed by only by OP-TEE channel
Reference:
- b2fb22396f97 ("ARM: dts: stm32mp15: remove shmem for scmi-optee")
- 3fce6bf21309 ("ARM: dts: stm32mp13: remove shmem for scmi-optee")
Moreover the patch is coherent with linux behavior
(https://lore.kernel.org/r/[email protected])
This part was initially introduced by Etienne when OP-TEE transport use
a static or dynamic shmem in DDR,
which was mapped by default as cacheable.
But it is more the case for STM32 SoCs today or in futur
(SCMI channel with TF-M use internal memory mapped not ccheable).
Does the MP25 use SCP at all, or does OP-TEE on Cortex-A handle the
SCMI/hardware interaction ?
Anything else left over ?
Reviewed-by: Patrick Delaunay <[email protected]>
Thank you
