On 12/1/2025 4:31 PM, Hrushikesh Salunke wrote:
Add PCIe boot documentation for J784S4-EVM including boot mode switch
settings, hardware setup requirements, endpoint configuration details
and step-by-step boot procedure.

Signed-off-by: Hrushikesh Salunke <[email protected]>
---
  doc/board/ti/j784s4_evm.rst | 267 ++++++++++++++++++++++++++++++++++++
  1 file changed, 267 insertions(+)

diff --git a/doc/board/ti/j784s4_evm.rst b/doc/board/ti/j784s4_evm.rst
index 22442874110..0c9dad122a7 100644
--- a/doc/board/ti/j784s4_evm.rst
+++ b/doc/board/ti/j784s4_evm.rst
@@ -280,6 +280,10 @@ http://www.ti.com/lit/zip/spruj52 under the `Boot Mode 
Pins` section.
       - 00000000
       - 01110000
+ * - PCIe
+     - 10001000
+     - 01010000
+
  For SW7 and SW11, the switch state in the "ON" position = 1.
Boot Mode Pins for AM69-SK
@@ -311,6 +315,269 @@ section.
For SW2, the switch state in the "ON" position = 1. +PCIe Boot
+---------
+
+The J784S4 SoC supports booting over PCIe, allowing the device to function
+as a PCIe endpoint and receive boot loader images from a PCIe root complex.
+
+Hardware Setup
+^^^^^^^^^^^^^^
+
+To boot J784S4 via PCIe, the following hardware setup is required:
+
+1. Configure the boot mode switches on J784S4-EVM for PCIe boot:
+
+   .. code-block:: text
+
+      SW7:  01010000
+      SW11: 10001000
+
+2. Connect the J784S4-EVM (endpoint) to a PCIe root complex (e.g., x86 host)
+   using a PCIe cable. Both boards should be powered off before making the
+   connection.
+
+Endpoint Configuration
+^^^^^^^^^^^^^^^^^^^^^^
+
+The following configuration options are enabled by default in
+``j784s4_evm_r5_defconfig`` and ``j784s4_evm_a72_defconfig``:
+
+- ``CONFIG_SPL_PCI_DFU_BAR_SIZE``: Size of the PCIe BAR for DFU/boot image 
download
+- ``CONFIG_SPL_PCI_DFU_VENDOR_ID``: PCIe vendor ID advertised by the endpoint
+- ``CONFIG_SPL_PCI_DFU_DEVICE_ID``: PCIe device ID advertised by the endpoint
+- ``CONFIG_SPL_PCI_DFU_MAGIC_WORD``: Magic word written by root complex to 
signal image transfer completion
+- ``CONFIG_SPL_PCI_DFU_BOOT_PHASE``: Current boot phase indicator for root 
complex
+
+By default, PCIe root complex mode is enabled in the device tree. To enable
+endpoint mode, build the boot loaders with the device tree overlay
+``k3-j784s4-evm-pcie0-pcie1-ep.dtso``.

Do you think, you need bootph property in pcie_ep node ?


+
+PCIe Boot Procedure
+^^^^^^^^^^^^^^^^^^^
[..]+
+The following steps describe how to boot J784S4 over PCIe:

+
[..]

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