During clock's registration, clock's name are used to establish parent -
child relation. On STM32MP25, most of SCMI clocks are parent
clocks.
Since commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution"),
all scmi clocks are named by default "scmi-%zu" until they are enabled,
it breaks clocks registration and boot process for STM32MP25 platforms.
By resolving SCMI clocks before clocks registration, it solves the issue.
Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
Signed-off-by: Patrice Chotard <[email protected]>
---
drivers/clk/stm32/clk-stm32mp25.c | 139 ++++++++++++++++++++++++++++++++++++++
1 file changed, 139 insertions(+)
diff --git a/drivers/clk/stm32/clk-stm32mp25.c
b/drivers/clk/stm32/clk-stm32mp25.c
index b487f33b6c7..a0bf2a47332 100644
--- a/drivers/clk/stm32/clk-stm32mp25.c
+++ b/drivers/clk/stm32/clk-stm32mp25.c
@@ -5,6 +5,8 @@
#include <clk-uclass.h>
#include <dm.h>
+#include <clk/scmi.h>
+#include <dm/device_compat.h>
#include <dt-bindings/clock/st,stm32mp25-rcc.h>
#include <linux/bitfield.h>
#include <linux/clk-provider.h>
@@ -43,6 +45,131 @@
#define SEC_RIFRCC(_id) (STM32MP25_RIFRCC_##_id##_ID)
#define SEC_RIFSC(_id) ((_id) | SEC_RIFSC_FLAG)
+const int stm32mp25_scmi_clks[] = {
+ CK_SCMI_ICN_HS_MCU,
+ CK_SCMI_ICN_SDMMC,
+ CK_SCMI_ICN_DDR,
+ CK_SCMI_ICN_DISPLAY,
+ CK_SCMI_ICN_HSL,
+ CK_SCMI_ICN_NIC,
+ CK_SCMI_ICN_VID,
+ CK_SCMI_FLEXGEN_07,
+ CK_SCMI_FLEXGEN_08,
+ CK_SCMI_FLEXGEN_09,
+ CK_SCMI_FLEXGEN_10,
+ CK_SCMI_FLEXGEN_11,
+ CK_SCMI_FLEXGEN_12,
+ CK_SCMI_FLEXGEN_13,
+ CK_SCMI_FLEXGEN_14,
+ CK_SCMI_FLEXGEN_15,
+ CK_SCMI_FLEXGEN_16,
+ CK_SCMI_FLEXGEN_17,
+ CK_SCMI_FLEXGEN_18,
+ CK_SCMI_FLEXGEN_19,
+ CK_SCMI_FLEXGEN_20,
+ CK_SCMI_FLEXGEN_21,
+ CK_SCMI_FLEXGEN_22,
+ CK_SCMI_FLEXGEN_23,
+ CK_SCMI_FLEXGEN_24,
+ CK_SCMI_FLEXGEN_25,
+ CK_SCMI_FLEXGEN_26,
+ CK_SCMI_FLEXGEN_27,
+ CK_SCMI_FLEXGEN_28,
+ CK_SCMI_FLEXGEN_29,
+ CK_SCMI_FLEXGEN_30,
+ CK_SCMI_FLEXGEN_31,
+ CK_SCMI_FLEXGEN_32,
+ CK_SCMI_FLEXGEN_33,
+ CK_SCMI_FLEXGEN_34,
+ CK_SCMI_FLEXGEN_35,
+ CK_SCMI_FLEXGEN_36,
+ CK_SCMI_FLEXGEN_37,
+ CK_SCMI_FLEXGEN_38,
+ CK_SCMI_FLEXGEN_39,
+ CK_SCMI_FLEXGEN_40,
+ CK_SCMI_FLEXGEN_41,
+ CK_SCMI_FLEXGEN_42,
+ CK_SCMI_FLEXGEN_43,
+ CK_SCMI_FLEXGEN_44,
+ CK_SCMI_FLEXGEN_45,
+ CK_SCMI_FLEXGEN_46,
+ CK_SCMI_FLEXGEN_47,
+ CK_SCMI_FLEXGEN_48,
+ CK_SCMI_FLEXGEN_49,
+ CK_SCMI_FLEXGEN_50,
+ CK_SCMI_FLEXGEN_51,
+ CK_SCMI_FLEXGEN_52,
+ CK_SCMI_FLEXGEN_53,
+ CK_SCMI_FLEXGEN_54,
+ CK_SCMI_FLEXGEN_55,
+ CK_SCMI_FLEXGEN_56,
+ CK_SCMI_FLEXGEN_57,
+ CK_SCMI_FLEXGEN_58,
+ CK_SCMI_FLEXGEN_59,
+ CK_SCMI_FLEXGEN_60,
+ CK_SCMI_FLEXGEN_61,
+ CK_SCMI_FLEXGEN_62,
+ CK_SCMI_FLEXGEN_63,
+ CK_SCMI_ICN_LS_MCU,
+ CK_SCMI_HSE,
+ CK_SCMI_LSE,
+ CK_SCMI_HSI,
+ CK_SCMI_LSI,
+ CK_SCMI_MSI,
+ CK_SCMI_HSE_DIV2,
+ CK_SCMI_CPU1,
+ CK_SCMI_SYSCPU1,
+ CK_SCMI_PLL2,
+ CK_SCMI_PLL3,
+ CK_SCMI_RTC,
+ CK_SCMI_RTCCK,
+ CK_SCMI_ICN_APB1,
+ CK_SCMI_ICN_APB2,
+ CK_SCMI_ICN_APB3,
+ CK_SCMI_ICN_APB4,
+ CK_SCMI_ICN_APBDBG,
+ CK_SCMI_TIMG1,
+ CK_SCMI_TIMG2,
+ CK_SCMI_BKPSRAM,
+ CK_SCMI_BSEC,
+ CK_SCMI_ETR,
+ CK_SCMI_FMC,
+ CK_SCMI_GPIOA,
+ CK_SCMI_GPIOB,
+ CK_SCMI_GPIOC,
+ CK_SCMI_GPIOD,
+ CK_SCMI_GPIOE,
+ CK_SCMI_GPIOF,
+ CK_SCMI_GPIOG,
+ CK_SCMI_GPIOH,
+ CK_SCMI_GPIOI,
+ CK_SCMI_GPIOJ,
+ CK_SCMI_GPIOK,
+ CK_SCMI_GPIOZ,
+ CK_SCMI_HPDMA1,
+ CK_SCMI_HPDMA2,
+ CK_SCMI_HPDMA3,
+ CK_SCMI_HSEM,
+ CK_SCMI_IPCC1,
+ CK_SCMI_IPCC2,
+ CK_SCMI_LPDMA,
+ CK_SCMI_RETRAM,
+ CK_SCMI_SRAM1,
+ CK_SCMI_SRAM2,
+ CK_SCMI_LPSRAM1,
+ CK_SCMI_LPSRAM2,
+ CK_SCMI_LPSRAM3,
+ CK_SCMI_VDERAM,
+ CK_SCMI_SYSRAM,
+ CK_SCMI_OSPI1,
+ CK_SCMI_OSPI2,
+ CK_SCMI_TPIU,
+ CK_SCMI_SYSDBG,
+ CK_SCMI_SYSATB,
+ CK_SCMI_TSDBG,
+ CK_SCMI_STM500,
+};
+
static const char * const adc12_src[] = {
"ck_flexgen_46", "ck_icn_ls_mcu"
};
@@ -761,6 +888,8 @@ static int stm32mp25_clk_probe(struct udevice *dev)
{
fdt_addr_t base = dev_read_addr(dev->parent);
struct udevice *scmi;
+ ulong id;
+ int i, ret;
if (base == FDT_ADDR_T_NONE)
return -EINVAL;
@@ -768,6 +897,16 @@ static int stm32mp25_clk_probe(struct udevice *dev)
/* force SCMI probe to register all SCMI clocks */
uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(scmi_clock),
&scmi);
+ /* resolve attribute for all SCMI clocks */
+ for (i = 0; i < ARRAY_SIZE(stm32mp25_scmi_clks); i++) {
+ id = CLK_ID(scmi, stm32mp25_scmi_clks[i]);
+ ret = scmi_clk_resolve_attr(id, NULL);
+ if (ret) {
+ dev_err(dev, "Failed to resolve SCMI clk %d\n",
+ stm32mp25_scmi_clks[i]);
+ }
+ }
+
stm32_rcc_init(dev, &stm32mp25_data);
return 0;
--
2.43.0
