Hi Stefano, On Thu, 14 Jul 2011 10:30:11 +0200 Stefano Babic <sba...@denx.de> wrote:
> On 07/14/2011 09:11 AM, David Jander wrote: > > This is a port of the official PLL errata workaround from Freescale to > > mainline u-boot. > > The PLL's in the i.MX51 processor can go out of lock due to a metastable > > condition in an analog flip-flop when used at high frequencies. > > This workaround implements an undocumented feature in the PLL (dither > > mode), which causes the effect of this failure to be much lower (in terms > > of frequency deviation), avoiding system failure, or at least decreasing > > the likelihood of system failure. > > > > Signed-off-by: David Jander <da...@protonic.nl> > > Hi David, > > do you have now also an official Errata number from Freescale to be > added to your documentation ? Freescale promised an official errata a week ago, but released the errata just yesterday (hadn't seen it until now). The number is ENGcm12051. Do you mind including it in the commit yourself, or do you want me to re-post? Best regards, -- David Jander Protonic Holland. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
