Hi Jonas, On Thu, Jan 8, 2026 at 5:41 PM Jonas Karlman <[email protected]> wrote: > > Hi Alexey, > > On 1/6/2026 7:26 PM, Alexey Charkov wrote: > > On Tue, Jan 6, 2026 at 6:09 PM Neil Armstrong <[email protected]> > > wrote: > >> > >> On 1/6/26 14:57, Alexey Charkov wrote: > >>> Rockchip RK3576 can boot fully from UFS, but as part of the boot > >>> process the SPL needs to place part of the ATF code into PMU SRAM, > >>> which is outside the SDRAM range that the UFSHC can access. > >>> > >>> Enable a quirk to force bounce operation for this case. > >>> > >>> Signed-off-by: Alexey Charkov <[email protected]> > >>> --- > >>> drivers/ufs/Kconfig | 1 + > >>> drivers/ufs/ufs-rockchip.c | 1 + > >>> 2 files changed, 2 insertions(+) > >>> > >>> diff --git a/drivers/ufs/Kconfig b/drivers/ufs/Kconfig > >>> index 6c75bb2a0790..2543b5d47c04 100644 > >>> --- a/drivers/ufs/Kconfig > >>> +++ b/drivers/ufs/Kconfig > >>> @@ -76,6 +76,7 @@ config UFS_RENESAS_GEN5 > >>> config UFS_ROCKCHIP > >>> bool "Rockchip specific hooks to UFS controller platform driver" > >>> depends on UFS > >>> + select BOUNCE_BUFFER > >>> help > >>> This selects the Rockchip specific additions to UFSHCD platform > >>> driver. > >>> > >>> diff --git a/drivers/ufs/ufs-rockchip.c b/drivers/ufs/ufs-rockchip.c > >>> index 0384244387da..699460fc4d15 100644 > >>> --- a/drivers/ufs/ufs-rockchip.c > >>> +++ b/drivers/ufs/ufs-rockchip.c > >>> @@ -153,6 +153,7 @@ static int ufs_rockchip_common_init(struct ufs_hba > >>> *hba) > >>> return err; > >>> } > >>> > >>> + hba->quirks |= UFSHCD_QUIRK_DMA_SDRAM_ONLY; > >> > >> So you really want to enable this quirk for non-SPL builds aswell ? > > > > Well I haven't run into any similar issues with the main U-boot, so I > > don't have a strong opinion about keeping it in place there. > > > > However: > > 1. Having the quirk enabled doesn't cause all transfers to go via the > > bounce buffer. Only those for which the provided destination buffer > > happens to be outside SDRAM (which must be extremely rare if at all > > possible under U-boot, given that it hasn't caused issues for anyone) > > 2. If it turns out that there are indeed cases when the UFSHC needs to > > read or write something outside SDRAM while operating under U-boot (I > > can't think of a reason now, but then I couldn't think about that ATF > > to PMU SRAM thing either, until I ran into it and spent more than half > > a day debugging) then I'd rather spend a couple of CPU cycles on a > > memmove than end up with a hard lock up, a cryptic error message and a > > dump of UFSHC status registers > > 3. It's one line less code this way :) > > > > Happy to add something like "if (xpl_phase() == PHASE_SPL)" though, if > > that sounds better to everyone. > > You should most likely be able to drop this quirk workaround with the > "rockchip: rk3576: Fix DMA transfer of TF-A to PMU_SRAM" series [1][2] > that I just sent out. > > Please try if that also solves the DMA transfer from UFS to PMU SRAM > issue, it did for eMMC, SD-card and SPI flash. > > [1] https://patchwork.ozlabs.org/cover/2181298/ > [2] https://lore.kernel.org/r/[email protected]/
This is brilliant - works like a charm on UFS without any quirks! Thanks a lot, I'll re-roll my patch series without the quirks portion and mark a dependency on your series in b4 metadata. Best regards, Alexey
