On Fri, 27 Jun 2025 10:22:44 +0530, Balaji Selvanathan wrote:
> Added delays before and after setting the PIPE_UTMI_CLK_SEL and
> PIPE3_PHYSTATUS_SW bits in the Qscratch GENERAL_CFG register
> during UTMI clock selection for DWC3 on Qualcomm platforms.
>
> These delays help ensure proper timing and stability of the UTMI
> clock switching sequence, potentially avoiding race conditions or
> unstable PHY behavior during initialization.
>
> [...]
Applied, thanks!
[1/1] usb: dwc3: qcom: Add delays in UTMI clock selection for Qscratch
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/fba8fc4a9620
Best regards,
--
// Casey (she/they)
