Commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
is breaking boot for STM32MP1/STM32MP2 family board.The issue is due to registering clock with default name "scmi-%zu". If one of these clocks has children clocks, it will generate an error when trying to register their child's clocks as shown below: ... clk_register: failed to get ck_axi device (parent of qspi_k) clk_register: failed to get pll4_p device (parent of spi2_k) clk_register: failed to get pll4_p device (parent of spi3_k) clk_register: failed to get ck_hsi device (parent of usart3_k) clk_register: failed to get ck_hsi device (parent of uart5_k) clk_register: failed to get ck_hsi device (parent of uart7_k) ... Clock management update for STM32MP13 and STM32MP25 SoCs family to no longer use clock name to establish relationship between parent and child clocks. Signed-off-by: Patrice Chotard <[email protected]> --- Changes in v4: - Fix data abort in clk_stm32_resolve_clk_name() during SPL boot. - Link to v3: https://lore.kernel.org/r/20251215-restore_boot_for_stm32mp13_stm32mp25_boards_v2-v3-0-d055da246...@foss.st.com Changes in v3: - Rework clock management for STM32MP13/2 - Link to v2: https://lore.kernel.org/r/20251211-restore_boot_for_stm32mp13_stm32mp25_boards_v2-v2-0-44e6e7de2...@foss.st.com --- Patrice Chotard (3): clk: stm32mp13: Reorder include files ARM: dts: stm32: Add SCMI clocks in rcc node for stm32mp131.dtsi clk: stm32: Update clock management for STM32MP13/25 arch/arm/dts/stm32mp13-u-boot.dtsi | 27 +++ drivers/clk/stm32/clk-stm32-core.c | 116 ++++++++-- drivers/clk/stm32/clk-stm32-core.h | 42 ++-- drivers/clk/stm32/clk-stm32mp13.c | 441 +++++++++++++++++++++++++------------ drivers/clk/stm32/clk-stm32mp25.c | 405 +++++++++++++++++++++------------- 5 files changed, 709 insertions(+), 322 deletions(-) --- base-commit: 1da640cc46ad84efb57bb45e02dd6c40265b5488 change-id: 20251211-restore_boot_for_stm32mp13_stm32mp25_boards_v2-e7497f503414 Best regards, -- Patrice Chotard <[email protected]>
