On 22-01-2026 08:51, Kumar, Udit wrote:
Thanks Anurag
On 1/21/2026 11:08 AM, Anurag Dutta wrote:
The R5 SPL requires 32-bit address mappings for OSPI1(QSPI) access.
Override the OSPI1 node with appropriate 32-bit register ranges to
enable proper address translation on the 32-bit R5 core, while
preserving 64-bit mappings for A72 cores. While at it, remove the
disabled status override for ospi1 node to support booting from
qspi.
Signed-off-by: Anurag Dutta <[email protected]>
---
Test logs :
https://gist.github.com/anuragdutta731/b65f63f22c69317d714b65a201438cbc
Could you check, for below error in logs
jedec_spi_nor flash@0: Software reset enable failed: -524
If this needs some parameter tuning in QSPI node or something to look
at driver itself.
Hi Udit
This warning seems to be expected. In file : drivers/mtd/spi/spi-nor-core.c,
In function spi_nor_soft_reset(), we can see that spi_nor_setup_op() is
being invoked
with SNOR_PROTO_8_8_8_DTR as default. However, ours being QSPI(1 1 4) it
fails to enable
software reset for qspi. This can be confirmed from ospi nor logs :
https://gist.github.com/anuragdutta731/cc30688b596ee063178e6c47947146c0
We do not see the jedec_spi_nor flash@0: Software reset enable failed:
-524 warning.
Also, the spi_nor_soft_reset() description clearly mentions that :
The soft reset is executed in Octal DTR mode.
Regards
Anurag
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 4 ----
arch/arm/dts/k3-j721s2-r5.dtsi | 5 +++++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index 54eb9b4072c..8d51fea72b8 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -107,10 +107,6 @@
};
};
-&ospi1 {
- status = "disabled";
-};
-
&usbss0 {
bootph-all;
};
diff --git a/arch/arm/dts/k3-j721s2-r5.dtsi
b/arch/arm/dts/k3-j721s2-r5.dtsi
index c1c12e217d2..f3f7dbd86c1 100644
--- a/arch/arm/dts/k3-j721s2-r5.dtsi
+++ b/arch/arm/dts/k3-j721s2-r5.dtsi
@@ -90,6 +90,11 @@
<0x0 0x50000000 0x0 0x8000000>;
};
+&ospi1 {
+ reg = <0x0 0x47050000 0x0 0x100>,
+ <0x0 0x58000000 0x0 0x8000000>;
+};
+
&fss {
/* fss node has 64 bit address regions mapped to it and since
the ospi
* nodes is being override, override the fss node ranges as well
