This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.
Signed-off-by: Daniel Schwierzeck <daniel.schwierz...@googlemail.com>
---
arch/mips/cpu/mips32/start.S | 13 ++++++++++---
include/configs/incaip.h | 2 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 5d7467d..e829b02 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -64,9 +64,16 @@
_start:
RVECENT(reset,0) # U-boot entry point
RVECENT(reset,1) # software reboot
-#ifdef CONFIG_INCA_IP
- .word INFINEON_EBU_BOOTCFG # EBU init code, fetched during
- .word 0x00000000 # booting phase of the flash
+#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
+ /*
+ * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
+ * access external NOR flashes. If the board boots from NOR flash the
+ * internal BootROM does a blind read at address 0xB0000010 to read the
+ * initial configuration for that EBU in order to access the flash
+ * device with correct parameters. This config option is board-specific.
+ */
+ .word CONFIG_SYS_XWAY_EBU_BOOTCFG
+ .word 0x00000000
#else
RVECENT(romReserved,2)
#endif
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index 57eb2fa..0e5ad2b 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -41,7 +41,7 @@
#define CONFIG_CPU_CLOCK_RATE 150000000
#endif
-#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
+#define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
--
1.7.6
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