The get_dcache_line_size() function is supposed to work in conjunction
with memalign call to provide D cache aligned DMA buffers.
This commit adds support for reading the D cache line size for armv7
architecture. Moreover a default implementation of get_dcache_line_size()
is provided.
Signed-off-by: Lukasz Majewski <l.majew...@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com>
CC: Aneesh V <ane...@ti.com>
CC: Albert ARIBAUD <albert.u.b...@aribaud.net>
---
Changes for v2:
- Weak function get_dcache_line_size added to arch/arm/lib/cache.c
Changes for v3:
- __BIGGEST_ALIGNMENT__ GCC constant added
Changes for v4:
- Weak function get_dcache_line_size added to arch/arm/lib/cache.c for non armv7
architectures
---
arch/arm/cpu/armv7/cache_v7.c | 14 ++++++++++++++
include/common.h | 1 +
lib/Makefile | 1 +
lib/cache.c | 34 ++++++++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 0 deletions(-)
create mode 100644 lib/cache.c
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 3e1e1bf..ea5a3e4 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -246,6 +246,20 @@ static void v7_inval_tlb(void)
CP15ISB;
}
+/* Read the cache line size (in bytes) */
+int get_dcache_line_size(void)
+{
+ u32 ccsidr, log2_line_len;
+
+ ccsidr = get_ccsidr();
+ log2_line_len = ((ccsidr & CCSIDR_LINE_SIZE_MASK) >>
+ CCSIDR_LINE_SIZE_OFFSET) + 2;
+ /* Converting from words to bytes */
+ log2_line_len += 2;
+
+ return 1 << log2_line_len;
+}
+
void invalidate_dcache_all(void)
{
v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
diff --git a/include/common.h b/include/common.h
index 12a1074..b535300 100644
--- a/include/common.h
+++ b/include/common.h
@@ -622,6 +622,7 @@ void flush_dcache_range(unsigned long start,
unsigned long stop);
void invalidate_dcache_range(unsigned long start, unsigned long stop);
void invalidate_dcache_all(void);
void invalidate_icache_all(void);
+int get_dcache_line_size(void);
/* arch/$(ARCH)/lib/ticks.S */
unsigned long long get_ticks(void);
diff --git a/lib/Makefile b/lib/Makefile
index 884f64c..c0070c2 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,6 +49,7 @@ COBJS-$(CONFIG_SHA1) += sha1.o
COBJS-$(CONFIG_SHA256) += sha256.o
COBJS-y += strmhz.o
COBJS-$(CONFIG_RBTREE) += rbtree.o
+COBJS-y += cache.o
endif
COBJS-y += ctype.o
diff --git a/lib/cache.c b/lib/cache.c
new file mode 100644
index 0000000..b8f49ce
--- /dev/null
+++ b/lib/cache.c
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2011 SAMSUNG Electronics
+ * Łukasz Majewski <l.majew...@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/* Read the default Data CACHE LINE size */
+int __attribute__((weak)) get_dcache_line_size(void)
+{
+#if defined(CONFIG_SYS_CACHE_LINE_SIZE) && !defined(CONFIG_SYS_DCACHE_OFF)
+ return CONFIG_SYS_CACHE_LINE_SIZE;
+#else
+ return __BIGGEST_ALIGNMENT__; /* Constant defined by GCC compiler */
+#endif
+}
--
1.7.2.3
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