On 09/12/2011 02:55 PM, Nick Thompson wrote: > On 12/09/11 12:21, Simon Schwarz wrote: >> Hi List, >> >> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in >> my SPL. >> >> I’m searching for the speed bottleneck of the MT29F1G16ABBHC-ET >> NAND-Flash on the devkit8000 (OMAP3). >> >> From the timings I set on the GPMC I calced a max. speed of around 26 >> MiB/s. In my measurements I have a speed of around 10 MiB/s. >> >> Here is the image of my the calculation: >> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US >> >> tcmd: The time for the initial read command >> twr: time to write the address >> tDn: Time for a 16bit read of Data >> >> Does anyone has an idea where the bottleneck could be? Is my calculation >> wrong? >> (ecc is done parallel to the DMA transfer). > > I only had a quick look at your calculation, but didn't notice anything to > account > for the NAND copy to read cache (data ready) time of the NAND device. > > Nick.
Ahh you mean t_R (Page read time) right? Taking this into account I would expect something around 19,45 MiB/s. Thank you! Simon _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
