Nick,

I am seeing this issue on da830/da850/dm36x/dm644x.

I agree that u-boot will be faster with cache enabled. And also, TI wants it to 
be enabled soon. Since so many patches are lined u, we don't up-streaming them 
to get hampered because of this issue. So, we are trying to push this 
Patch. We are committed come up with appropriate patch to fix the EMAC and 
coherency issue. 

Meanwhile, we are trying to gather info about earlier patch/changes which 
disabled cache so that community understands the known issue.

Also, one more engineer observed the issue with EMAC, I will send his mail to 
you. 

Regards,
Nag
On Wed, Aug 31, 2011 at 15:09:35, Nick Thompson wrote:
> On 31/08/11 06:40, Netagunte, Nagabhushana wrote:
> > Mike,
> >
> > We will address cache coherency issues soon after these patches.
> > Earlier also, chache was disabled. Only due to new cache management 
> > Framework which was added recently, it is explicitly needed to be indicated 
> > to turn off cache. 
> >
> > Since fixing the cache coherency issues with EMAC will take some time, I 
> > want this patch to go in mainline so that issue doesn't crop up for People 
> > who use u-boot.
> >
> > Regards,
> > Nag
> >
> 
> Which device(s) does this occur on? I have a lot of OMAP-L137 (EVM and 
> custom) boards with cache enabled and no problems tftp'ing the kernel.
> 
> On the other hand tftp and kernel CRC checking are much faster with cache 
> enabled.
> 
> Nick.
> 

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