On Aug 26, 2011, at 1:32 PM, York Sun wrote: > DDR2 has different ODT table and values. Adding table according to Samsung > application note. > > Fix additive latency calculation to avoid interger underflow. > > Signed-off-by: York Sun <york...@freescale.com> > --- > .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 3 +- > arch/powerpc/cpu/mpc8xxx/ddr/options.c | 214 +++++++++++++++++++- > arch/powerpc/include/asm/fsl_ddr_sdram.h | 7 + > doc/README.fsl-ddr | 52 +++++ > 4 files changed, 274 insertions(+), 2 deletions(-)
applied, converted dynamic_odt_t to struct dynamic_odt - k _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
