Hi,

These series bring support of DaVinci EMAC interface on TI AM35xx
processors.
Changes:
 1. Common defines and register definitions moved to
drivers/net/davinci_emac.h
 2. Added coding/decoding of internal RAM addresses.
 3. DaVinci-specific PHY parts moved under #ifdefs.
 4. Added support for running with D-Cache enabled. Actually
this part is broken as of cabe287 commit and I need your guidance how
to proceed there. Should I check the cache line size and care about
alignment from the driver? Shouldn't this be abstracted by some sort
of API?
 5. Speed is hardcoded to 100Mbps. This definetely needs a better
solution but somehow existing code causes troubles.
 6. AM35xx-specific defines added into the separate header.

I'm not sure if I should just squash all the patches into one.

Thanks.

Signed-off-by: Ilya Yanok <ya...@emcraft.com>

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