> sdhci_readw does not work for host version read in Armada100 series > SoCs. This patch fix this issue by making a sdhci_readl call to get host > version. > > Signed-off-by: Ajay Bhargav <ajay.bhar...@einfochips.com> > --- > drivers/mmc/mv_sdhci.c | 6 ++++++ > 1 files changed, 6 insertions(+), 0 deletions(-) > > diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c > index f92caeb..c7fd287 100644 > --- a/drivers/mmc/mv_sdhci.c > +++ b/drivers/mmc/mv_sdhci.c > @@ -30,6 +30,7 @@ static inline void mv_sdhci_writeb(struct sdhci_host > *host, u8 val, int reg) #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */ > > static char *MVSDH_NAME = "mv_sdh"; > + > int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) > { > struct sdhci_host *host = NULL; > @@ -48,7 +49,12 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, > u32 quirks) mv_ops.write_b = mv_sdhci_writeb; > host->ops = &mv_ops; > #endif > +#ifdef CONFIG_ARMADA100 > + /* SDHCI host version read workaround for Armada100 series */ > + host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; > +#else > host->version = sdhci_readw(host, SDHCI_HOST_VERSION); > +#endif > add_sdhci(host, max_clk, min_clk); > return 0; > }
Basically armada100 can't do 16bit access to that register. Ok, but why does it work for other registers? Also, can you make this a config option like CONFIG_SDHCI_REG32_QUIRK (invent some better name ;-) ). Cheers _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot