On 11/12/2011 06:37 PM, Jana Rapava wrote:
> Add macros and structures needed by Efika USB support code.
> Move shared offset and bits definitions into common header file.
>
> Signed-off-by: Jana Rapava <ferma...@gmail.com>
> Cc: Marek Vasut <marek.va...@gmail.com>
> Cc: Remy Bohmer <li...@bohmer.net>
> Cc: Stefano Babic <sba...@denx.de>
> Cc: Igor Grinberg <grinb...@compulab.co.il>
> Cc: Wolfgang Grandegger <w...@denx.de>
> ---
> Changes for v2:
> - whitespace and coding style changes
> Changes for v3:
> - ULPI-related definitions moved to ULPI header file
> Changes for v4:
> - rename "ulpi_viewpoint", because it's called "ulpi_viewport"
> in documentation
>
> drivers/usb/host/ehci-mxc.c | 31 +--------------
> include/usb/ehci-fsl.h | 86
> ++++++++++++++++++++++++++++++++++++++++++-
> 2 files changed, 88 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
> index fde1f0f..2c1295f 100644
> --- a/drivers/usb/host/ehci-mxc.c
> +++ b/drivers/usb/host/ehci-mxc.c
> @@ -27,31 +27,6 @@
> #include <usb/ehci.h>
> #include <usb/ehci-core.h>
>
> -#define USBCTRL_OTGBASE_OFFSET 0x600
> -
> -#ifdef CONFIG_MX25
> -#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6)
> -#define MX25_USB_CTRL_HSTD_BIT (1<<5)
> -#define MX25_USB_CTRL_USBTE_BIT (1<<4)
> -#define MX25_USB_CTRL_OCPOL_OTG_BIT (1<<3)
> -#endif
> -
> -#ifdef CONFIG_MX31
> -#define MX31_OTG_SIC_SHIFT 29
> -#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
> -#define MX31_OTG_PM_BIT (1 << 24)
> -
> -#define MX31_H2_SIC_SHIFT 21
> -#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
> -#define MX31_H2_PM_BIT (1 << 16)
> -#define MX31_H2_DT_BIT (1 << 5)
> -
> -#define MX31_H1_SIC_SHIFT 13
> -#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
> -#define MX31_H1_PM_BIT (1 << 8)
> -#define MX31_H1_DT_BIT (1 << 4)
> -#endif
> -
> static int mxc_set_usbcontrol(int port, unsigned int flags)
> {
> unsigned int v;
> @@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int
> flags)
>
> switch (port) {
> case 0: /* OTG port */
> - v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
> + v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
> v |= (flags & MXC_EHCI_INTERFACE_MASK)
> - << MX31_OTG_SIC_SHIFT;
> + << MXC_OTG_SIC_SHIFT;
> if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
> - v |= MX31_OTG_PM_BIT;
> + v |= MXC_OTG_PM_BIT;
>
> break;
> case 1: /* H1 port */
> diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
> index 67600ed..2b1ac22 100644
> --- a/include/usb/ehci-fsl.h
> +++ b/include/usb/ehci-fsl.h
> @@ -169,6 +169,80 @@
> #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
> #endif
>
> +#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
> +#define USBCTRL_OTGBASE_OFFSET 0x600
> +#endif
> +
> +#ifdef CONFIG_MX25
> +#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6)
> +#define MX25_USB_CTRL_HSTD_BIT (1<<5)
> +#define MX25_USB_CTRL_USBTE_BIT (1<<4)
> +#define MX25_USB_CTRL_OCPOL_OTG_BIT (1<<3)
> +#endif
> +
> +#ifdef CONFIG_MX31
> +#define MX31_H2_SIC_SHIFT 21
> +#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
> +#define MX31_H2_PM_BIT (1 << 16)
> +#define MX31_H2_DT_BIT (1 << 5)
> +
> +#define MX31_H1_SIC_SHIFT 13
> +#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
> +#define MX31_H1_PM_BIT (1 << 8)
> +#define MX31_H1_DT_BIT (1 << 4)
> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
> +/* offset for first USB CTRL register */
> +#define MX5_CTRL_REGS_OFFSET 0x800
> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
> +/* USB_CTRL register bits of interest*/
> +#define MXC_OTG_SIC_SHIFT 29
> +#define MXC_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
> +#define MXC_OTG_WUE (1 << 27)
> +#define MXC_OTG_PM (1 << 24)
> +#endif
> +
> +#ifdef CONFIG_MX51
> +#define MX51_REGISTER_LAYOUT_LENGTH 0x200
> +
> +/* Register offsets for MX51 */
> +#define MX51_OTG_ID 0x000
> +#define MX51_UH1_ID 0x200
> +#define MX51_UH2_ID 0x400
> +
> +/* USB_CTRL register bits of interest*/
> +#define MX51_OTG_PM (1 << 24)
> +#define MX51_H1_ULPI_IE (1 << 12)
> +#define MX51_H1_WUE (1 << 11)
> +#define MX51_H1_PM (1 << 8)
> +
> +/* PHY_CTRL_0 register bits of interest */
> +#define MX51_OTG_OVERCURD (1 << 8)
> +#define MX51_EHCI_POWERPINSE (1 << 5)
> +
> +/* PHY_CTRL_1 register bits of interest */
> +#define MX51_SYSCLOCK_24_MHZ (1 << 0)
> +#define MX51_SYSCLOCK_MASK (~(0xffffffff << 2))
> +
> +/* USB_CTRL_1 register bits of interest */
> +#define MX51_H1_EXTCLKE (1 << 25)
> +
> +/* USB Host 2 CTRL register bits of interest */
> +#define MX51_H2_ULPI_IE (1 << 8)
> +#define MX51_H2_WUE (1 << 7)
> +#define MX51_H2_PM (1 << 4)
Most of the definitions above are arch specific and would better be
placed in arch/arm/include/asm/arch-mx25/31/5, I think.
> +/* PORTSCx bits of interest */
> +#define MX51_ULPI_MODE_MASK (2 << 30)
> +#define MX51_16BIT_UTMI (1 << 28)
In ehci-fsl.h we have already
#define PORT_PTS_ULPI (2 << 30)
#define PORT_PTS_PTW (1 << 28)
> +/* USBCMD bits of interest */
> +#define MX51_ITC_IMMEDIATE_MASK (0xff << 16)
> +#endif
> +
> /*
> * USB Registers
> */
> @@ -210,7 +284,7 @@ struct usb_ehci {
> u32 txfilltuning; /* 0x164 - Host TT Transmit
> pre-buffer packet tuning */
> u8 res7[0x8];
> - u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */
> + u32 ulpi_viewport; /* 0x170 - ULPI Register Access */
> u8 res8[0xc];
> u32 config_flag; /* 0x180 - Configured Flag Register */
> u32 portsc; /* 0x184 - Port status/control */
> @@ -242,4 +316,14 @@ struct usb_ehci {
> u8 res13[0xafc];
> };
>
> +struct mx5_usb_control_regs {
> + u32 usbctrl; /* 0x800 - USB Control */
> + u32 otgmirror; /* 0x804 - OTG Port Mirror */
> + u32 phyctrl0; /* 0x808 - UTMI PHY Control Register 0 */
> + u32 phyctrl1; /* 0x80C - UTMI PHY Control Register 1 */
> + u32 usbctrl1; /* 0x810 - USB Control Register 1 */
> + u32 uh2ctrl; /* 0x814 - USB Host2 Control */
> + u32 uh3ctrl; /* 0x818 - USB Host3 Control */
> +};
Good.
Wolfgang
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