commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't
execute on Tegra, due to the AVP (ARM7TDI) not having a CP15.
Result was an undefined instruction hang just after reset.
Signed-off-by: Tom Warren <twar...@nvidia.com>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
Cc: Tom Rini <tr...@ti.com>
---
arch/arm/cpu/armv7/start.S | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d23dc9d..ceed11e 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -144,6 +144,7 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
+#if !defined(CONFIG_TEGRA2)
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -159,6 +160,7 @@ reset:
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
+#endif /* !Tegra2 */
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
--
1.7.7.1
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