> Not really ... that's how it all works. When Stefano sends pull RQ, it'll go > mainline.
Aha, so it's not mainline yet after all ;-) But I get it; It's available in Fabio's repo and will be in Denx mainline soon. > I see no problems with the board DRAM detection on our board, no. I tested > this > quite thoroughly. > > I don't see the registers differ either ... ever. I suspect your problem is > with > your DRAM configuration data -- if your DRAM chip is misconfigured, you'll > get > such memory problems. It works beautifully; I have no reason to assume there's anything wrong with it. When it detects 0 MiB SDRAM, it's been my own fault so far: Obscure reset scenarios, incremental builds where a clean build was due, etc. > RFC/patch is always welcome. Great. I'll see what I can come up with. > MX28EVK has no NAND if I understand it correctly. It has one of these beautiful TSOP-48 footprint compatible ZIF sockets on board. Standard it's empty, but with a Samsung K9G08UOM in it, it worked out-of-the-box using your m28evk configuration. However mx28evk NAND is mutually exclusive with the use of MMC1 socket because of shared pins. So in my config, CMD_NAND is used to configure in NAND and to configure out MMC1. > Make a patch and submit to the mailing list, like everyone else does please. > Don't try to reinvent wheel ... square one this time even. It's hardly worth a patch; Perhaps Fabio already typed his own. But I'll submit one tomorrow anyway. Robert. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot