board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.

Signed-off-by: Helmut Raiger <helmut.rai...@hale.at>
---
 V2: pmic_reg_(read|write) use constants from fsl_pmic.h now

 board/hale/tt01/tt01.c |   54 ++++++++++++++++++++++++++++++++++++++++++++++-
 include/configs/tt01.h |   12 ++++++++++
 2 files changed, 64 insertions(+), 2 deletions(-)

diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..10f4548 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -26,6 +26,7 @@
 #include <netdev.h>
 #include <command.h>
 #include <pmic.h>
+#include <fsl_pmic.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
@@ -175,8 +176,6 @@ int board_init(void)
 
 int board_late_init(void)
 {
-       pmic_init();
-
 #ifdef CONFIG_HW_WATCHDOG
        mxc_hw_watchdog_enable();
 #endif
@@ -190,6 +189,36 @@ int checkboard(void)
        return 0;
 }
 
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+       u32 val;
+       struct pmic *p;
+
+       /*
+       * this is the first driver to use the pmic, so call
+       * pmic_init() here. board_late_init() is too late for
+       * the MMC driver.
+       */
+       pmic_init();
+       p = get_pmic();
+
+       /* configure pins for SDHC1 only */
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+       /* turn on power V_MMC1 */
+       if (pmic_reg_read(p, REG_MODE_1, &val) < 0)
+               pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+       return mxc_mmc_init(bis);
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
        int rc = 0;
@@ -198,3 +227,24 @@ int board_eth_init(bd_t *bis)
 #endif
        return rc;
 }
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+       u32 srev = get_cpu_rev();
+
+       switch (line_number) {
+       case 2:
+               sprintf(info, " CPU  : Freescale i.MX31 rev %d.%d%s at %d MHz",
+                               (srev & 0xF0) >> 4, (srev & 0x0F),
+                               ((srev & 0x8000) ? " unknown" : ""),
+                               mxc_get_clock(MXC_ARM_CLK) / 1000000);
+               break;
+       case 3:
+               strcpy(info, " " BOARD_STRING);
+               break;
+       default:
+               info[0] = 0;
+       }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a553712..6846816 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,11 @@
 #define CONFIG_SMC911X_BASE            (CS4_BASE+0x200000)
 #define CONFIG_SMC911X_16_BIT
 
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE       SDHC1_BASE_ADDR
 /*
  * Command definition
  */
@@ -229,6 +234,13 @@
 
 #define CONFIG_CMDLINE_EDITING
 
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
 #define CONFIG_NAND_MXC
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_MAX_CHIPS              1
-- 
1.7.4.4



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