> This patch adds USB host controller's UTMI PHY interface driver for > Armada100 SOCs. > > Signed-off-by: Ajay Bhargav <ajay.bhar...@einfochips.com> > --- > Changes for v2: > - Fix: enable only required clock in MPMU > > arch/arm/include/asm/arch-armada100/armada100.h | 8 ++ > drivers/usb/host/utmi-armada100.c | 87 > +++++++++++++++++++++++ drivers/usb/host/utmi-armada100.h | > 79 ++++++++++++++++++++ 3 files changed, 174 insertions(+), 0 > deletions(-) > create mode 100644 drivers/usb/host/utmi-armada100.c > create mode 100644 drivers/usb/host/utmi-armada100.h > > diff --git a/arch/arm/include/asm/arch-armada100/armada100.h > b/arch/arm/include/asm/arch-armada100/armada100.h index 0ed3a8e..70fba27 > 100644 > --- a/arch/arm/include/asm/arch-armada100/armada100.h > +++ b/arch/arm/include/asm/arch-armada100/armada100.h > @@ -43,6 +43,14 @@ > #define SSP2_APBCLK 0x01 > #define SSP2_FNCLK 0x02 > > +/* USB Clock/reset control bits */ > +#define USB_SPH_AXICLK_EN 0x10 > +#define USB_SPH_AXI_RST 0x02 > + > +/* MPMU Clocks */ > +#define APB2_26M_EN (1 << 20) > +#define AP_26M (1 << 4) > + > /* Register Base Addresses */ > #define ARMD1_DRAM_BASE 0xB0000000 > #define ARMD1_FEC_BASE 0xC0800000 > diff --git a/drivers/usb/host/utmi-armada100.c > b/drivers/usb/host/utmi-armada100.c new file mode 100644 > index 0000000..1a4d3f2 > --- /dev/null > +++ b/drivers/usb/host/utmi-armada100.c > @@ -0,0 +1,87 @@ > +/* > + * (C) Copyright 2012 > + * eInfochips Ltd. <www.einfochips.com> > + * Written-by: Ajay Bhargav <ajay.bhar...@einfochips.com> > + * > + * (C) Copyright 2009 > + * Marvell Semiconductor <www.marvell.com> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > + * MA 02110-1301 USA > + */ > + > +#include <common.h> > +#include <asm/io.h> > +#include <usb.h> > +#include <asm/arch/cpu.h> > +#include <asm/arch/armada100.h> > +#include "utmi-armada100.h" > + > +static void utmi_phy_init(void) > +{ > + struct armd1usb_phy_reg *phy_regs = > + (struct armd1usb_phy_reg *)UTMI_PHY_BASE; > + > + setbits_le32(&phy_regs->utmi_ctrl, INPKT_DELAY_SOF | PLL_PWR_UP); > + udelay(1000); > + setbits_le32(&phy_regs->utmi_ctrl, PHY_PWR_UP); > + > + clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); > + setbits_le32(&phy_regs->utmi_pll, N_DIVIDER << PLL_FBDIV | M_DIVIDER); > + > + setbits_le32(&phy_regs->utmi_tx, PHSEL_VAL << CK60_PHSEL); > + > + /* Calibrate pll */ > + while ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0) > + ;
No endless loops please. > + > + udelay(200); > + setbits_le32(&phy_regs->utmi_pll, VCOCAL_START); > + udelay(400); > + clrbits_le32(&phy_regs->utmi_pll, VCOCAL_START); > + > + udelay(200); > + setbits_le32(&phy_regs->utmi_tx, RCAL_START); > + udelay(400); > + clrbits_le32(&phy_regs->utmi_tx, RCAL_START); > + > + while ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0) > + ; > +} DTTO M _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot