> Hi Marek, > IMO, Simon has already mentioned the reason of using > ALLOC_CACHE_ALIGN_BUFFER, > Please find below my explanation about other doubts. > > On Monday 27 February 2012 10:19 PM, Marek Vasut wrote: > >> As DMA expects the buffers to be equal and larger then > >> cache lines, This aligns buffers at cacheline. > >> > >> Signed-off-by: Puneet Saxena<pune...@nvidia.com> > >> Signed-off-by: Jim Lin<ji...@nvidia.com> > >> --- > > > > First of all, thanks for this patch, it really helps. But, there are a > > few things that concern me. > > > >> Changes for V2: > >> - Use "ARCH_DMA_MINALIGN" directly > >> - Use "ALIGN" to align size as cacheline > >> - Removed headers from usb.h > >> - Send 8 bytes of device descriptor size to read > >> > >> Max packet size > >> > >> scsi.h header is needed to avoid extra memcpy from local buffer > >> to global buffer. > >> > >> common/cmd_usb.c | 3 +- > >> common/usb.c | 61 > >> > >> ++++++++++++++++++++++++------------------ common/usb_storage.c | > >> 59 +++++++++++++++++++---------------------- disk/part_dos.c > >> | > >> > >> 2 +- > >> > >> drivers/usb/host/ehci-hcd.c | 8 +++++ > >> include/scsi.h | 4 ++- > >> 6 files changed, 77 insertions(+), 60 deletions(-) > >> > >> diff --git a/common/cmd_usb.c b/common/cmd_usb.c
I see, thanks for explaining! M _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot