According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
power supply is being enabled and is ramping up (those bits might be
left set by the previous bootloader). It doesn't say what happens if
this procedure is violated, but better not to risk here and do things
as required.

Signed-off-by: Grazvydas Ignotas <nota...@gmail.com>
---
 drivers/mmc/omap_hsmmc.c |   16 +++++++++++-----
 1 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 12ff0a2..e9e1d2a 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -62,15 +62,21 @@ static void omap4_vmmc_pbias_config(struct mmc *mmc)
 
 unsigned char mmc_board_init(struct mmc *mmc)
 {
-#if defined(CONFIG_TWL4030_POWER)
-       twl4030_power_mmc_init();
-#endif
-
 #if defined(CONFIG_OMAP34XX)
        t2_t *t2_base = (t2_t *)T2_BASE;
        struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+       u32 pbias_lite;
 
-       writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
+       pbias_lite = readl(&t2_base->pbias_lite);
+       pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0);
+       writel(pbias_lite, &t2_base->pbias_lite);
+#endif
+#if defined(CONFIG_TWL4030_POWER)
+       twl4030_power_mmc_init();
+       mdelay(100);    /* ramp-up delay from Linux code */
+#endif
+#if defined(CONFIG_OMAP34XX)
+       writel(pbias_lite | PBIASLITEPWRDNZ1 |
                PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
                &t2_base->pbias_lite);
 
-- 
1.7.0.4

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to