The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum.
Cc: Marek Vasut <ma...@denx.de>
Signed-off-by: Tom Rini <tr...@ti.com>
---
drivers/usb/musb/musb_core.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index a8adcce..bd1ad82 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -74,6 +74,16 @@ struct musb_epN_regs {
u8 fifosize;
};
+/*
+ * The EHCI spec says that we must align to at least 32 bytes. However,
+ * some platforms require larger alignment.
+ */
+#if ARCH_DMA_MINALIGN > 32
+#define USB_DMA_MINALIGN ARCH_DMA_MINALIGN
+#else
+#define USB_DMA_MINALIGN 32
+#endif
+
/* Mentor USB core register overlay structure */
#ifndef musb_regs
struct musb_regs {
@@ -145,7 +155,7 @@ struct musb_regs {
struct musb_epN_regs epN;
} ep[16];
-} __attribute__((packed, aligned(32)));
+} __attribute__((packed, aligned(USB_DMA_MINALIGN)));
#endif
/*
--
1.7.9.5
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