[U-Boot] [PATCH 2/3] dm: mips: Fix lb60 timer code

[Marek Vasut]

The timer code contains more halfword writes which trigger gcc errors.
The registers are again 32bit, yet written by 16bit writes, fix this:

timer.c: In function ‘reset_timer_masked’:
timer.c:37:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘get_timer_masked’:
timer.c:43:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘timer_init’:
timer.c:86:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]
timer.c:88:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]
timer.c:89:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]
timer.c:90:2: warning: dereferencing type-punned pointer will break 
strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Daniel <z...@ingenic.cn>
Cc: Shinya Kuribayashi <skuri...@pobox.com>
Cc: Xiangfu Liu <xian...@openmobilefree.net>
---
 arch/mips/cpu/xburst/timer.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c
index de6f5da..b6b3855 100644
--- a/arch/mips/cpu/xburst/timer.c
+++ b/arch/mips/cpu/xburst/timer.c
@@ -34,13 +34,13 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu 
*)JZ4740_TCU_BASE;
 void reset_timer_masked(void)
 {
        /* reset time */
-       gd->lastinc = readw(&tcu->tcnt0);
+       gd->lastinc = readl(&tcu->tcnt0);
        gd->tbl = 0;
 }
 
 ulong get_timer_masked(void)
 {
-       ulong now = readw(&tcu->tcnt0);
+       ulong now = readl(&tcu->tcnt0);
 
        if (gd->lastinc <= now)
                gd->tbl += now - gd->lastinc; /* normal mode */
@@ -83,11 +83,11 @@ void udelay_masked(unsigned long usec)
 
 int timer_init(void)
 {
-       writew(TCU_TCSR_PRESCALE256 | TCU_TCSR_EXT_EN, &tcu->tcsr0);
+       writel(TCU_TCSR_PRESCALE256 | TCU_TCSR_EXT_EN, &tcu->tcsr0);
 
-       writew(0, &tcu->tcnt0);
-       writew(0, &tcu->tdhr0);
-       writew(TIMER_FDATA, &tcu->tdfr0);
+       writel(0, &tcu->tcnt0);
+       writel(0, &tcu->tdhr0);
+       writel(TIMER_FDATA, &tcu->tdfr0);
 
        /* mask irqs */
        writel((1 << TIMER_CHAN) | (1 << (TIMER_CHAN + 16)), &tcu->tmsr);
-- 
1.7.10.4

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