This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.
Signed-off-by: Markus Hubig <mhu...@imko.de>
Cc: Andreas Bießmann <andreas.de...@googlemail.com>
---
MAINTAINERS | 16 ++-
board/taskit/stamp9g20/Makefile | 52 ++++++++
board/taskit/stamp9g20/stamp9g20.c | 196 ++++++++++++++++++++++++++++++
boards.cfg | 2 +
include/configs/stamp9g20.h | 235 ++++++++++++++++++++++++++++++++++++
5 files changed, 495 insertions(+), 6 deletions(-)
create mode 100644 board/taskit/stamp9g20/Makefile
create mode 100644 board/taskit/stamp9g20/stamp9g20.c
create mode 100644 include/configs/stamp9g20.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 84413de..7eb55db 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -243,12 +243,6 @@ Klaus Heydeck <heyd...@kieback-peter.de>
KUP4K MPC855
KUP4X MPC859
-Ilko Iliev <il...@ronetix.at>
-
- PM9261 AT91SAM9261
- PM9263 AT91SAM9263
- PM9G45 ARM926EJS (AT91SAM9G45 SoC)
-
Gary Jennejohn <ga...@denx.de>
quad100hd PPC405EP
@@ -681,10 +675,20 @@ Vaibhav Hiremath <hvaib...@ti.com>
am3517_evm ARM ARMV7 (AM35x SoC)
+Markus Hubig <mhu...@imko.de>
+
+ STAMP9G20 ARM926EJS
+
Grazvydas Ignotas <nota...@gmail.com>
omap3_pandora ARM ARMV7 (OMAP3xx SoC)
+Ilko Iliev <il...@ronetix.at>
+
+ PM9261 AT91SAM9261
+ PM9263 AT91SAM9263
+ PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+
Michael Jones <michael.jo...@matrix-vision.de>
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/taskit/stamp9g20/Makefile b/board/taskit/stamp9g20/Makefile
new file mode 100644
index 0000000..e99bfaa
--- /dev/null
+++ b/board/taskit/stamp9g20/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stel...@popies.net>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# (C) Copyright 2012
+# Markus Hubig <mhu...@imko.de>
+# IMKO GmbH <www.imko.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y += stamp9g20.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/taskit/stamp9g20/stamp9g20.c
b/board/taskit/stamp9g20/stamp9g20.c
new file mode 100644
index 0000000..80359a7
--- /dev/null
+++ b/board/taskit/stamp9g20/stamp9g20.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stel...@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Achim Ehrlich <aehrl...@taskit.de>
+ * taskit GmbH <www.taskit.de>
+ *
+ * (C) Copyright 2012-
+ * Markus Hubig <mhu...@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <watchdog.h>
+
+#ifdef CONFIG_MACB
+# include <net.h>
+# include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void stamp9G20_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+ struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+ unsigned long csa;
+
+ /* Assign CS3 to NAND/SmartMedia Interface */
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+ writel(csa, &matrix->ebicsa);
+
+ /* Configure SMC CS3 for NAND/SmartMedia */
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(2),
+ &smc->cs[3].mode);
+
+ /* Configure RDY/BSY */
+ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+ /* Enable NandFlash */
+ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+
+#ifdef CONFIG_MACB
+static void stamp9G20_macb_hw_init(void)
+{
+ struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+ struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+ unsigned long erstl;
+
+ /* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */
+ at91_set_gpio_output(AT91_PIN_PA26, 0);
+
+ /*
+ * Disable pull-up on:
+ * RXDV (PA17) => PHY normal mode (not Test mode)
+ * ERX0 (PA14) => PHY ADDR0
+ * ERX1 (PA15) => PHY ADDR1
+ * ERX2 (PA25) => PHY ADDR2
+ * ERX3 (PA26) => PHY ADDR3
+ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
+ *
+ * PHY has internal pull-down
+ */
+ writel(pin_to_mask(AT91_PIN_PA14) |
+ pin_to_mask(AT91_PIN_PA15) |
+ pin_to_mask(AT91_PIN_PA17) |
+ pin_to_mask(AT91_PIN_PA18) |
+ pin_to_mask(AT91_PIN_PA28),
+ &pioa->pudr);
+
+ erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
+
+ /* Need to reset PHY -> 500ms reset */
+ writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+ AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+ writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
+
+ /* Wait for end of hardware reset */
+ unsigned long start = get_timer(0);
+ unsigned long timeout = 1000; /* 1000ms */
+
+ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
+
+ /* avoid shutdown by watchdog */
+ WATCHDOG_RESET();
+ mdelay(10);
+
+ /* timeout for not getting stuck in an endless loop */
+ if (get_timer(start) >= timeout) {
+ puts("*** ERROR: Timeout waiting for PHY reset!\n");
+ break;
+ };
+ };
+
+ /* Restore NRST value */
+ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
+ &rstc->mr);
+
+ /* Re-enable pull-up */
+ writel(pin_to_mask(AT91_PIN_PA14) |
+ pin_to_mask(AT91_PIN_PA15) |
+ pin_to_mask(AT91_PIN_PA17) |
+ pin_to_mask(AT91_PIN_PA18) |
+ pin_to_mask(AT91_PIN_PA28),
+ &pioa->puer);
+
+ /* Initialize EMAC=MACB hardware */
+ at91_macb_hw_init();
+}
+#endif /* CONFIG_MACB */
+
+int board_early_init_f(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ /* Enable clocks for all PIOs */
+ writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+ (1 << ATMEL_ID_PIOC), &pmc->pcer);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ /* Enables the red LED on PortuxG20 */
+ at91_set_gpio_output(AT91_PIN_PC5, 1);
+
+ /* Enables the serial interface */
+ at91_set_gpio_output(AT91_PIN_PC9, 1);
+ at91_seriald_hw_init();
+
+ stamp9G20_nand_hw_init();
+#ifdef CONFIG_MACB
+ stamp9G20_macb_hw_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size(
+ (void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+#ifdef CONFIG_MACB
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+ return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+}
+#endif /* CONFIG_MACB */
diff --git a/boards.cfg b/boards.cfg
index 1af87c0..8ee772b 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -120,6 +120,8 @@ cpu9G20_nand_128M arm arm926ejs
cpu9260 eukrea
pm9261 arm arm926ejs pm9261
ronetix at91 pm9261:AT91SAM9261
pm9263 arm arm926ejs pm9263
ronetix at91 pm9263:AT91SAM9263
pm9g45 arm arm926ejs pm9g45
ronetix at91 pm9g45:AT91SAM9G45
+portuxg20 arm arm926ejs stamp9g20
taskit at91 stamp9g20:AT91SAM9G20,PORTUXG20
+stamp9g20 arm arm926ejs stamp9g20
taskit at91 stamp9g20:AT91SAM9G20
cam_enc_4xx arm arm926ejs cam_enc_4xx ait
davinci cam_enc_4xx
da830evm arm arm926ejs da8xxevm
davinci davinci
da850_am18xxevm arm arm926ejs da8xxevm
davinci davinci
da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50
diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h
new file mode 100644
index 0000000..e59fe0e
--- /dev/null
+++ b/include/configs/stamp9g20.h
@@ -0,0 +1,235 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stel...@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2010
+ * Achim Ehrlich <aehrl...@taskit.de>
+ * taskit GmbH <www.taskit.de>
+ *
+ * (C) Copyright 2012
+ * Markus Hubig <mhu...@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
+ * Configuation settings for the stamp9g20 CPU module.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
+ * program. Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE 0x23f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
+
+/* Misc CPU related settings */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
+#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
+#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_BOARD_EARLY_INIT_f /* call board_early_init_f() */
+#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
+
+/* setting board spezific options */
+#ifdef CONFIG_PORTUXG20
+# define CONFIG_MACH_TYPE MACH_TYPE_PORTUXG20
+# define CONFIG_MACB
+#else
+# define CONFIG_MACH_TYPE MACH_TYPE_STAMP9G20
+#endif
+
+/*
+ * SDRAM: 1 bank, 64 MB, base address 0x20000000
+ * Already initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE (64 * (1024 << 10))
+
+/*
+ * Perform a SDRAM Memtest from the start of SDRAM
+ * till the beginning of the U-Boot position in RAM.
+ */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN \
+ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above that
+ * address while providing maximum stack area below.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+/* NAND flash settings */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO /* enable the GPIO features */
+#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral
pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Ethernet configuration
+ *
+ * PortuxG20 has always ethernet but for Stamp9G20 you
+ * can enable it here if your baseboard features ethernet.
+ */
+
+/* #define CONFIG_MACB */
+
+#ifdef CONFIG_MACB
+# define CONFIG_RMII /* use reduced MII inteface */
+# define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
+
+/* BOOTP and DHCP options */
+# define CONFIG_BOOTP_BOOTFILESIZE
+# define CONFIG_BOOTP_BOOTPATH
+# define CONFIG_BOOTP_GATEWAY
+# define CONFIG_BOOTP_HOSTNAME
+# define CONFIG_NFSBOOTCOMMAND \
+ "setenv autoload yes; setenv autoboot yes; " \
+ "setenv bootargs ${basicargs} ${mtdparts} " \
+ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
+ "dhcp"
+#endif /* CONFIG_MACB */
+
+/* Enable the watchdog */
+#define CONFIG_AT91SAM9_WATCHDOG
+#define CONFIG_HW_WATCHDOG
+
+/* USB configuration */
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+
+/* General Boot Parameter */
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+
+/*
+ * RAM Memory address where to put the
+ * Linux Kernel befor starting.
+ */
+#define CONFIG_SYS_LOAD_ADDR 0x22000000
+
+/*
+ * The NAND Flash partitions:
+ * ==========================================
+ * 0x0000000-0x001ffff -> 128k, bootstrap
+ * 0x0020000-0x005ffff -> 256k, u-boot
+ * 0x0060000-0x007ffff -> 128k, env1
+ * 0x0080000-0x009ffff -> 128k, env2 (backup)
+ * 0x0100000-0x06fffff -> 6M, kernel
+ * 0x0700000-0x8000000 -> 121M, RootFS
+ */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET (128 + 256 << 10)
+#define CONFIG_ENV_OFFSET_REDUND (128 + 256 + 128 << 10)
+#define CONFIG_ENV_SIZE (128 << 10)
+
+/*
+ * Predefined environment variables.
+ * Usefull to define some easy to use boot commands.
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS
\
+ \
+ "basicargs=console=ttyS0,115200\0" \
+ \
+ "mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \
+ "256k(uboot)ro,128k(env1)ro," \
+ "128k(env2)ro,6M(linux),-(root)rw\0" \
+ \
+ "flashboot=setenv bootargs ${basicargs} ${mtdparts} " \
+ "root=/dev/mtdblock5 rootfstype=jffs2; " \
+ "nand read 0x22000000 0x100000 0x600000; " \
+ "bootm 22000000\0" \
+ \
+ "sdboot=setenv bootargs ${basicargs} ${mtdparts} " \
+ "root=/dev/mmcblk0p1 rootwait; " \
+ "nand read 0x22000000 0x100000 0x600000; " \
+ "bootm 22000000"
+
+/* Command line & features configuration */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+
+#ifdef CONFIG_MACB
+# define CONFIG_CMD_PING
+# define CONFIG_CMD_DHCP
+#else
+# undef CONFIG_CMD_BOOTD
+# undef CONFIG_CMD_NET
+# undef CONFIG_CMD_NFS
+#endif /* CONFIG_MACB */
+
+#endif /* __CONFIG_H */
--
1.7.7
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