The most important difference between mips32 and mips64 is the address
space. changes in addrspace.h and io.h are for this sake. And this patch
add cache discribe struct in cache.h, and make compatible to mips64 of
some types in posix_types.h.
Signed-off-by: Zhizhou Zhang <etou...@gmail.com>
---
arch/mips/include/asm/addrspace.h | 2 +-
arch/mips/include/asm/cache.h | 21 +++++++++++++++++++++
arch/mips/include/asm/io.h | 18 +++++++++++++++++-
arch/mips/include/asm/posix_types.h | 12 +++++++++---
4 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/arch/mips/include/asm/addrspace.h
b/arch/mips/include/asm/addrspace.h
index 3a1e6d6..b768bb5 100644
--- a/arch/mips/include/asm/addrspace.h
+++ b/arch/mips/include/asm/addrspace.h
@@ -136,7 +136,7 @@
cannot access physical memory directly from core */
#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
#else /* !CONFIG_SOC_AU1X00 */
-#define UNCACHED_SDRAM(a) KSEG1ADDR(a)
+#define UNCACHED_SDRAM(a) CKSEG1ADDR(a)
#endif /* CONFIG_SOC_AU1X00 */
#endif /* __ASSEMBLY__ */
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 5406d5d..e41b9b4 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -33,4 +33,25 @@
#define ARCH_DMA_MINALIGN 128
#endif
+/*
+ * Descriptor for a cache
+ */
+struct cache_desc {
+ unsigned int size; /* total size */
+ unsigned int waysize; /* Bytes per way */
+ unsigned short sets; /* Number of lines per set */
+ unsigned char ways; /* Number of ways */
+ unsigned char linesz; /* Size of line in bytes */
+};
+
+#define cache_op(op,addr) \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noreorder \n" \
+ " .set mips64\n\t \n" \
+ " cache %0, %1 \n" \
+ " .set pop \n" \
+ : \
+ : "i" (op), "R" (*(unsigned char *)(addr)))
+
#endif /* __MIPS_CACHE_H__ */
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 025012a..1b82c61 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -120,12 +120,20 @@ static inline void set_io_port_base(unsigned long base)
*/
extern inline phys_addr_t virt_to_phys(volatile void * address)
{
+#ifndef CONFIG_64BIT
return CPHYSADDR(address);
+#else
+ return XPHYSADDR(address);
+#endif
}
extern inline void * phys_to_virt(unsigned long address)
{
- return (void *)KSEG0ADDR(address);
+#ifndef CONFIG_64BIT
+ return (void *)KSEG0ADDR(address);
+#else
+ return (void *)CKSEG0ADDR(address);
+#endif
}
/*
@@ -133,12 +141,20 @@ extern inline void * phys_to_virt(unsigned long address)
*/
extern inline unsigned long virt_to_bus(volatile void * address)
{
+#ifndef CONFIG_64BIT
return CPHYSADDR(address);
+#else
+ return XPHYSADDR(address);
+#endif
}
extern inline void * bus_to_virt(unsigned long address)
{
+#ifndef CONFIG_64BIT
return (void *)KSEG0ADDR(address);
+#else
+ return (void *)CKSEG0ADDR(address);
+#endif
}
/*
diff --git a/arch/mips/include/asm/posix_types.h
b/arch/mips/include/asm/posix_types.h
index 879aae2..0da1dde 100644
--- a/arch/mips/include/asm/posix_types.h
+++ b/arch/mips/include/asm/posix_types.h
@@ -24,9 +24,15 @@ typedef int __kernel_pid_t;
typedef int __kernel_ipc_pid_t;
typedef int __kernel_uid_t;
typedef int __kernel_gid_t;
-typedef unsigned int __kernel_size_t;
-typedef int __kernel_ssize_t;
-typedef int __kernel_ptrdiff_t;
+#ifndef CONFIG_MIPS64
+ typedef unsigned int __kernel_size_t;
+ typedef int __kernel_ssize_t;
+ typedef int __kernel_ptrdiff_t;
+#else
+typedef unsigned long __kernel_size_t;
+typedef long __kernel_ssize_t;
+typedef long __kernel_ptrdiff_t;
+#endif
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
--
1.7.9.5
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