From: Duncan Laurie <dlau...@chromium.org>
This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.
Signed-off-by: Duncan Laurie <dlau...@chromium.org>
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/cpu/coreboot/coreboot.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index ff42661..59d730e 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -118,5 +118,9 @@ int board_final_cleanup(void)
enable_cache();
}
+ /* Issue SMI to Coreboot to lock down ME and registers */
+ printf("Finalizing Coreboot\n");
+ outb(0xcb, 0xb2);
+
return 0;
}
--
1.7.7.3
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